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SN74LS75N PDF Datasheet Search Results

No Part number Description ( Function ) Manufacturers PDF
20 SN74LS724
Voltage Controlled Oscillator

DataShee DataSheet DataSheet DataSheet 4 U .com et DataShee DataSheet DataSheet DataSheet 4 U .com et DataSheet DataSheet DataSheet 4 U .com

Motorola Semiconductor
Motorola Semiconductor
pdf
19 SN74LS73A
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54LS / 74LS73A offers individual J, K, clear, and clock inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may be allowed to change when the clock pulse is HIGH and the bistable will perform according to the truth tabl

Motorola
Motorola
pdf
18 SN74LS73A
Dual J-K Flip-Flops With Clear

Texas Instruments
Texas Instruments
pdf
17 SN74LS748
10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS

10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS The SN54 / 74LS147 and the SN54/ 74LS148 are Priority Encoders. They provide priority decoding of the inputs to ensure that only the highest order data line is encoded. Both devices have data inputs and outputs which are active at the low logic level. The LS147 encodes nine data lines to four-line (8-4-2-1) BCD. The impl

Motorola
Motorola
pdf
16 SN74LS74A
LOW POWER SCHOTTKY

SN74LS74A Dual D-Type Positive Edge-Triggered Flip-Flop The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs. Information at input D is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggeri

ON Semiconductor
ON Semiconductor
pdf
15 SN74LS74A
Dual D-Type Positive-Edge -Triggered Flip-Flops With Preset And Clear

Texas Instruments
Texas Instruments
pdf



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