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PA102FDG PDF Datasheet Search Results

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2 PA102FDG
P-Channel Logic Level Enhancement

NIKO-SEM P-Channel Logic Level Enhancement Mode Field Effect Transistor PA102FDG TO-252 Lead-Free PRODUCT SUMMARY V(BR)DSS RDS(ON) -20 115m ID -10A D G S ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Current1 TC = 25 °C TC = 70 °C Po

NIKO-SEM
NIKO-SEM
pdf
1 PA102FDG
P-Channel Enhancement Mode MOSFET

PA102FDG P-Channel Enhancement Mode MOSFET PRODUCT SUMMARY V(BR)DSS RDS(ON) -20V 115mΩ @VGS = -4.5V ID -10A TO-252 ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL LIMITS Drain-Source Voltage VDS -20 Gate-Source Voltage VGS ±12 Continuous Drain Current Pulsed Drain Current1 TC = 25 °C TC = 100 °C ID IDM -10 -

UNIKC
UNIKC
pdf



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