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Datasheet BSS Equivalent ( PDF ) |
| N.º | Número de pieza | Descripción | Fabricantes | |
| 330 | BSS100 | SIPMOS Small-Signal Transistor (N channel Enhancement mode Logic Level) BSS 100
SIPMOS ® Small-Signal Transistor • N channel • Enhancement mode • Logic Level
• VGS(th) = 0.8...2.0V
Pin 1 S Type BSS 100 Type BSS 100 BSS 100 BSS 100 Pin 2 G Marking SS 100 Pin 3 D
VDS
100 V
ID
0.22 A
RDS(on)
6Ω
Package TO-92
Ordering Code Q62702-S499 Q62702-S007 Q62702-S2 |
 Siemens Semiconductor Group |
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| 329 | BSS100 | N-Channel Logic Level Enhancement Mode Field Effect Transistor September 1996
BSS100 / BSS123 N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
These N-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density proces |
 Fairchild Semiconductor |
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| 328 | BSS101 | SIPMOS Small-Signal Transistor BSS 101
SIPMOS ® Small-Signal Transistor • N channel • Enhancement mode • Logic Level
• VGS(th) = 0.8...2.0V
Pin 1 S Type BSS 101 Type BSS 101 BSS 101
Pin 2 G Marking SS 101
Pin 3 D
VDS
240 V
ID
0.13 A
RDS(on)
16 Ω
Package TO-92
Ordering Code Q62702-S493 Q62702-S636
Tape and Re |
 Siemens Semiconductor |
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| 327 | BSS110 | P-Channel Enhancement Mode Field Effect Transistor May 1999
BSS84 / BSS110 P-Channel Enhancement Mode Field Effect Transistor
General Description
These P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is designed to minimize on-st |
Fairchild Semiconductor |
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