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74LS74 PDF Datasheet

The 74LS74 is Low Power Schottky, Dual Positive-edge-triggered D Flip-flops. It also consolidates and displays results from multiple manufacturers with the same part number and similar functionality.




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Searched parts can be used interchangeably as substitutes for one another, But it's important to note that the parameters for each manufacturer may vary slightly.

Searched Lists

No Part number Description ( Function ) Manufacturers PDF
6 74LS74
LOW POWER SCHOTTKY

SN74LS74A Dual D-Type Positive Edge-Triggered Flip-Flop The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs. Information at input D is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggeri

ON Semiconductor
ON Semiconductor
pdf
5 74LS74
Dual Positive-Edge-Triggered D Flip-Flops

DM74LS74A Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs August 1986 Revised March 2000 DM74LS74A Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs General Description This device contains two independent positive-edge-triggered D flip-flops with complementary outputs. The information on the D input

Fairchild Semiconductor
Fairchild Semiconductor
pdf
4 74LS74
Dual D-type Positive Edge-triggered Flip-Flops(With Preset and Clear)

Unit: mm 19.20 20.32 Max 14 8 6.30 7.40 Max 1 2.39 Max 1.30 7 7.62 0.51 Min 2.54 Min 5.06 Max 2.54 ± 0.25 0.48 ± 0.10 0.25 – 0.05 0° – 15° + 0.10 Hitachi Code JEDEC EIAJ Weight (reference value) DP-14 Conforms Conforms 0.97 g Unit: mm 10.06 10.5 Max 14 8 5.5 1 7 *0.22 ± 0.05 0.20 ± 0.04 2.20 Max 7.80 – 0.30 1.15 0° – 8° + 0.20 1.42 Max 1.27 *0.42 ±

Hitachi Semiconductor
Hitachi Semiconductor
pdf
3 74LS74
Dual Positive-Edge-Triggered D Flip-Flops with Preset/ Clear and Complementary Outputs

54LS74 DM54LS74A DM74LS74A Dual Positive-Edge-Triggered D Flip-Flops with Preset Clear and Complementary Outputs June 1989 54LS74 DM54LS74A DM74LS74A Dual Positive-Edge-Triggered D Flip-Flops with Preset Clear and Complementary Outputs General Description This device contains two independent positive-edge-triggered D flip-flops with complementary outputs The information on th

National Semiconductor
National Semiconductor
pdf
2 74LS74
DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP

SN54/74LS74A DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs. Information at input D is transferred to the Q output on the positive-going edge of the clock pulse. Clock

Motorola Semiconductors
Motorola Semiconductors
pdf
1 74LS74A
Dual D-Type Positive-Edge -Triggered Flip-Flops With Preset And Clear

Texas Instruments
Texas Instruments
pdf

[1]    

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Vishay Semiconductor
Vishay
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On Semiconductor
ON Semiconductor
pdf

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