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PDF COP87L84RK Data sheet ( Hoja de datos )
| Número de pieza | COP87L84RK | |
| Descripción | 8-Bit CMOS OTP Microcontrollers with 8k or 32k Memory/ Comparator/ and Single-slope A/D Capability | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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September 1999
COP888EB
8-Bit CMOS ROM Based Microcontrollers with 8k
Memory, CAN Interface, 8-Bit A/D, and USART
General Description
The COP888EB ROM based microcontrollers are highly in-
tegrated COP8™ Feature core devices with 8k memory and
advanced features including a CAN 2.0B (passive) interface,
A/D and USART. These single-chip CMOS devices are
suited for applications requiring a full featured controller with
a CAN interface, low EMI, and versatile communications in-
terfaces. COP87L8EB/RB devices are pin and software
compatible 16k or 32k OTP (One Time Programmable) ver-
sions for pre-production, and for use with a range of COP8
software and hardware development tools.
Features include an 8-bit memory mapped architecture, 10
MHz CKI with 1µs instruction cycle, two multi-function 16-bit
timer/counters, WATCHDOG™ and Clock Monitor, CAN
2.0B (passive) interface, MICROWIRE/PLUS™ serial I/O,
SPI master/slave interface, fully buffered USART, 8-bit A/D
with 8 channels, two power saving HALT/IDLE modes,
MIWU, idle timer, software selectable I/O options, low EMI
4.5V to 5.5V operation, and 44/68 pin packages.
Note: A companion device with CAN interface, less I/O and
memory, and PWM timer is the COP888BC.
Devices included in this datasheet are:
Device
COP688EB
COP888EB
COP689EB
COP889EB
Memory (bytes)
8k ROM
8k ROM
8k ROM
8k ROM
RAM (bytes)
192
192
192
192
I/O Pins
31
31
58
58
Packages
44 PLCC
44 PLCC
68 PLCC
68 PLCC
Temperature
-55 to +125˚C
-40 to +85˚C
-55 to +125˚C
-40 to +85˚C
Key Features
n CAN bus interface, with Software Power save mode
n 8-bit A/D Converter with 8 channels
n Fully buffered USART
n Multi-input wake up (MIWU) on both Port L and M
n SPI Compatible Master/Slave Interface
n Quiet Design (Low Radiated Emissions)
n 8096 bytes of on-board ROM
n 192 bytes of on-board RAM
Additional Peripheral Features
n Idle timer (programmable)
n Two 16-bit timer, with two 16-bit registers supporting
— Processor independent PWM mode
— External Event counter mode
— Input capture mode
n WATCHDOG and Clock Monitor
n MICROWIRE/PLUS serial I/O
I/O Features
n Software selectable I/O options (TRI-STATE® outputs,
Push pull outputs, Weak pull up input, High impedance
input)
n Schmitt trigger inputs on Port G, L and M
n Packages: 44 PLCC with 31 I/O pins
68 PLCC with 58 I/O pins
n Fourteen multi-sourced vectored interrupts servicing
— External interrupt
— Idle Timer T0
— Timers (T1 and T2) (4 Interrupts)
— MICROWIRE/PLUS and SPI
— Multi-input Wake up
— Software Trap
— CAN interface (3 interrupts)
— USART (2 Inputs)
n Versatile easy to use instruction set
n 8-bit stack pointer (SP) (Stack in RAM)
n Two 8-bit Register Indirect Memory Pointers (B, X)
Fully Static CMOS
n Two power saving modes: HALT, IDLE
n Single supply operation: 4.5V to 5.5V
n Temperature ranges: −40˚C to +85˚C and
−55˚C to +125˚C
Development Support
n Emulation and OTP devices
n Real time emulation and full program debug offered by
MetaLink Development System
CPU/Instruction Set Features
n 1 µs instruction cycle time
COP8™, MICROWIRE™, MICROWIRE/PLUS™, and WATCHDOG™ are trademarks of National Semiconductor Corporation.
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
iceMASTER® is a registered trademark of MetaLink Corporation.
© 1999 National Semiconductor Corporation DS012837
www.national.com
1 page  
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (VCC)
Voltage at Any Pin
6V
−0.3V to VCC +0.3V
Total Current into VCC Pins (Source)
Total Current out of GND Pins (Sink)
90 mA
100 mA
Storage Temperature Range
−65˚C to +150˚C
Note 1: Absolute maximum ratings indicate limits beyond which damage to
the device may occur. DC and AC electrical specifications are not ensured
when operating the device at absolute maximum ratings.
DC Electrical Characteristics COP88xEB
−40˚C ≤ TA ≤ +85˚C
Parameter
Conditions
Operating Voltage
Power Supply Ripple (Note 2)
Peak-to-Peak
Supply Current
CKI = 10 MHz (Note 3)
VCC = 5.5V, tc = 1 µs
HALT Current (Notes 4, 5)
IDLE Current (Note 5)
CKI = 10 MHz
VCC = 5.5V, CKI = 0 MHz
VCC = 5.5V, tc = 1 µs
Input Levels (VIH, VIL)
Reset, CKI
Logic High
Logic Low
All Other Inputs
Logic High
Logic Low
Hi-Z Input Leakage
Input Pull-Up Current
Port G, L and M Input Hysteresis
VCC = 5.5V
VCC = 5.5V, VIN = 0V
(Note 8)
Output Current Levels
D Outputs
Source
Sink
CAN Transmitter Outputs
VCC = 4.5V, VOH = 3.3V
VCC = 4.5V, VOL = 1.0V
Source (Tx1)
Sink (Tx0)
All Others
VCC = 4.5V, VOH = VCC −0.1V
VCC = 4.5V, VOH = VCC − 0.6V
VCC = 4.5V, VOL = 0.1V
VCC = 4.5V, VOL = 0.6V
Source (Weak Pull-Up)
Source (Push-Pull)
Sink (Push-Pull)
TRI-STATE Leakage
Allowable Sink/Source Current per Pin
VCC = 4.5V, VOH = 2.7V
VCC = 4.5V, VOH = 3.3V
VCC = 4.5V, VOL = 0.4V
VCC = 5.5V
D Outputs (sink)
Tx0 (Sink) (Note 8)
Tx1 (Source) (Note 8)
All Other
Maximum Input Current
Room Temp
without Latchup (Notes 6, 8)
RAM Retention Voltage, Vr (Note 7)
Input Capacitance
500 ns Rise and Fall Time
(Note 8)
Load Capacitance on D2
Note 2: Maxiumum rate of voltage change must be < 0.5V/ms
Min
Typ
Max
Units
4.5 5.5 V
0.1 VCC
16
V
mA
< 1 µA
5.5 mA
0.8VCC
0.7VCC
−40
0.05VCC
0.2VCC
0.2VCC
±2
−250
V
V
V
V
µA
µA
V
−0.4
10
−1.5
−10
1.5
10
−10
−0.4
1.6
2.0
+5.0
−110
±2.0
15
30
30
3
±100
7
1000
mA
mA
mA
mA
mA
mA
µA
mA
mA
µA
mA
mA
mA
mA
mA
V
pF
pF
5 www.national.com
5 Page 
Typical Performance Characteristics (−55˚C ≤ TA = +125˚C) (Continued)
DS012837-61
Pin Description
VCC and GND are the power supply pins.
CKI is the clock input. The clock can come from a crystal os-
cillator (in conjunction with CKO). See Oscillator Description
section.
RESET is the master reset input. See Reset Description sec-
tion.
The device contains seven bidirectional 8-bit I/O ports (C, E,
F, G, L, M, N) where each individual bit may be indepen-
dently configured as an input (Schmitt trigger inputs on all
ports), output or TRI-STATE under program control. Three
data memory address locations are allocated for each of
these I/O ports. Each I/O port has two associated 8-bit
memory mapped registers, the CONFIGURATION register
and the output DATA register. A memory mapped address is
also reserved for the input pins of each I/O port. (See the
memory map for the various addresses associated with the
I/O ports.) Figure 5 shows the I/O port configurations for the
device. The DATA and CONFIGURATION registers allow for
each port bit to be individually configured under software
control as shown below:
Configuration
Data
Port Set-Up
Register
Register
0 0 Hi-Z Input
(TRI-STATE Output)
0 1 Input with Weak Pull-Up
1 0 Push-Pull Zero Output
1 1 Push-Pull One Output
Port L and M are 8-bit I/O ports, they support Multi-Input
Wake-up (MIWU) on all eight pins. All L-pins and M-pins
have Schmitt triggers on the inputs.
Port L and M only have one (1) interrupt vector.
FIGURE 5. I/O Port Configurations
DS012837-6
Port L has the following alternate features:
L7 MIWU
L6 MIWU
L5 MIWU
L4 MIWU
L3 MIWU or RDX
L2 MIWU or TDX
L1 MIWU or CKX
L0 MIWU
Port G is an 8-bit port with 5 I/O pins (G0–G5), an input pin
(G6), and one dedicated output pin (G7). Pins G0–G6 all
have Schmitt Triggers on their inputs. G7 serves as the dedi-
cated output pin for the CKO clock output. There are two reg-
isters associated with the G Port, a data register and a con-
figuration register. Therefore, each of the 6 I/O bits (G0–G5)
can be individually configured under software control.
Since G6 is an input only pin and G7 is the dedicated CKO
clock output pin the associated bits in the data and configu-
ration registers for G6 and G7 are used for special purpose
functions as outlined below. Reading the G6 and G7 data
bits will return zeroes.
Note that the chip will be placed in the HALT mode by wirting
a ’’1” to bit 7 of the Port G Data Register. Similarly the chip
will be placed in the IDLE mode by writing a “1” to bit 6 of the
Port G Data Register.
11 www.national.com
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| PDF Descargar | [ Datasheet COP87L84RK.PDF ] | |
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