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VNQ7140AJ-E PDF Datasheet - Quad channel high-side driver - STMicroelectronics

Part Number VNQ7140AJ-E
Description Quad channel high-side driver
Manufacturers STMicroelectronics 
Logo STMicroelectronics Logo 
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VNQ7140AJ-E datasheet, circuit
VNQ7140AJ-E
Quad channel high-side driver with MultiSense analog feedback
for automotive applications
Datasheet - production data
PowerSSO-16
GAPGCFT00327
– Configurable latch-off on overtemperature
or power limitation with dedicated fault
reset pin
– Loss of ground and loss of VCC
– Reverse battery with external components
– Electrostatic discharge protection
Features
Max transient supply voltage
VCC
Operating voltage range
VCC
Typ. on-state resistance (per Ch) RON
Current limitation (typ)
ILIMH
Stand-by current (max)
ISTBY
40 V
4 to 28 V
140 mΩ
12 A
0.5 µA
General
– Quad channel smart high-side driver with
MultiSense analog feedback
– Very low standby current
– Compatible with 3 V and 5 V CMOS
outputs
MultiSense diagnostic functions
– Multiplexed analog feedback of: load
current with high precision proportional
current mirror, VCC supply voltage and
TCHIP device temperature
– Overload and short to ground (power
limitation) indication
– Thermal shutdown indication
– OFF-state open-load detection
– Output short to VCC detection
– Sense enable/disable
Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
Applications
All types of automotive resistive, inductive and
capacitive loads
Specially intended for automotive signal lamps
(up to R10W or LED Real Combinations)
Description
The VNQ7140AJ-E is a quad channel high-side
driver manufactured using ST proprietary
VIPower® technology and housed in
PowerSSO-16 package. The device is designed
to drive 12 V automotive grounded loads through
a 3 V and 5 V CMOS-compatible interface,
providing protection and diagnostics.
The device integrates advanced protective
functions such as load current limitation, overload
active management by power limitation and
overtemperature shutdown with configurable
latch-off.
A FaultRST pin unlatches the output in case of
fault or disables the latch-off functionality.
A dedicated multifunction multiplexed analog
output pin delivers sophisticated diagnostic
functions including high precision proportional
load current sense, supply voltage feedback and
chip temperature sense, in addition to the
detection of overload and short circuit to ground,
short to VCC and OFF-state open-load.
A sense enable pin allows OFF-state diagnosis to
be disabled during the module low-power mode
as well as external sense resistor sharing among
similar devices
October 2014
This is information on a product in full production.
DocID018837 Rev 8
1/48
www.st.com

1 page

VNQ7140AJ-E pdf, schematic
Contents
Contents
VNQ7140AJ-E
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2 Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3 Main electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.1 Power limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.2 Thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.3 Current limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.4 Negative voltage clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
4.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 31
4.1.1 Diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
4.2 Immunity against transient electrical disturbances . . . . . . . . . . . . . . . . . . 32
4.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
4.4 Multisense - analog current sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
4.4.1
4.4.2
4.4.3
Principle of Multisense signal generation . . . . . . . . . . . . . . . . . . . . . . . 35
TCASE and VCC monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Short to VCC and OFF-state open-load detection . . . . . . . . . . . . . . . . . 38
4.5 Maximum demagnetization energy (VCC = 16 V) . . . . . . . . . . . . . . . . . . . 39
5 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
5.1 PowerSSO-16 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
6 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
6.1 ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
6.2 PowerSSO-16 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
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VNQ7140AJ-E equivalent
VNQ7140AJ-E
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
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Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
Figure 42.
Figure 43.
Figure 44.
Figure 45.
Figure 46.
Figure 47.
Figure 48.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
IOUT/ISENSE versus IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Current sense precision vs. IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Switching time and Pulse skew . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
MultiSense timings (current sense mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Multisense timings (chip temperature and VCC sense mode) . . . . . . . . . . . . . . . . . . . . . . 20
TDSKON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Latch functionality - behavior in hard short circuit condition (TAMB << TTSD) . . . . . . . . . . . 23
Latch functionality - behavior in hard short circuit condition . . . . . . . . . . . . . . . . . . . . . . . . 23
Latch functionality - behavior in hard short circuit condition (autorestart mode + latch off) 24
Standby mode activation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Standby state diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
OFF-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Standby current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
IGND(ON) vs. Iout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Logic Input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Logic Input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
High level logic input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Low level logic input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Logic Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
FaultRST Input clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
On-state resistance vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
On-state resistance vs. VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Won vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Woff vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
ILIMH vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
OFF-state open-load voltage detection threshold. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Vsense clamp vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Vsenseh vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Simplified internal structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Multisense and diagnostic – block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Multisense block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Analogue HSD – open-load detection in off-state. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Open-load / short to VCC condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
GND voltage shift . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Maximum turn off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
PowerSSO-16 on two-layers PCB (2s0p to JEDEC JESD 51-5) . . . . . . . . . . . . . . . . . . . . 40
PowerSSO-16 on four-layers PCB (2s2p to JEDEC JESD 51-7) . . . . . . . . . . . . . . . . . . . . 40
PowerSSO-16 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . 41
PowerSSO-16 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . 41
Thermal fitting model for PowerSSO-16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
PowerSSO-16 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
DocID018837 Rev 8
5/48
5

5 Page

VNQ7140AJ-E diode, scr
VNQ7140AJ-E
Electrical specification
Symbol
Table 3. Absolute maximum ratings (continued)
Parameter
Value
ISENSE
EMAX
VESD
VESD
Tj
Tstg
MultiSense pin DC output current
(VGND = VCC and VSENSE < 0 V)
MultiSense pin DC output current in reverse (VCC < 0 V)
Maximum switching energy (single pulse)
(TDEMAG = 0.4 ms; Tjstart = 150 °C)
Electrostatic discharge (JEDEC 22A-114F)
– INPUT0,1,2,3
– MultiSense
– SEn, SEL0,1,2, FaultRST
– OUTPUT0,1,2,3
– VCC
Charge device model (CDM-AEC-Q100-011)
Junction operating temperature
Storage temperature
10
-20
10
4000
2000
4000
4000
4000
750
-40 to 150
-55 to 150
Unit
mA
mJ
V
V
V
V
V
V
°C
2.2
Thermal data
Table 4. Thermal data
Symbol
Parameter
Typ. value Unit
Rthj-board
Rthj-amb
Rthj-amb
Thermal resistance junction-board (JEDEC JESD 51-5 / 51-8)(1)(2)
Thermal resistance junction-ambient (JEDEC JESD 51-5)(1)(3)
Thermal resistance junction-ambient (JEDEC JESD 51-7)(1)(2)
1. One channel ON.
2. Device mounted on four-layers 2s2p PCB.
3. Device mounted on two-layers 2s0p PCB with 2 cm2 heatsink copper trace.
7.7
61
26.8
°C/W
DocID018837 Rev 8
9/48
47

9 Page

VNQ7140AJ-E transistor, igbt
VNQ7140AJ-E
Electrical specification
Table 10. Truth table
Mode
Conditions
INX FR SEn SELX OUTX MultiSense
Comments
Standby
All logic inputs
low
L
L
L
L
L
Hi-Z
Low quiescent
current consumption
LX
L
Normal
Nominal load
connected;
Tj < 150°C
HL
HH
Refer to
Table 11
H
Refer to
Table 11
Outputs configured
for auto-restart
H
Outputs configured
for Latch-off
Overload
Overload or
short to GND
causing:
Tj > TTSD or
ΔTj > ΔTj_SD
LX
HL
HH
Refer to
Table 11
L
H
Refer to
Table 11
Output cycles with
temperature
hysteresis
L Output latches-off
Under-
voltage
VCC < VUSD
(falling)
OFF-state
diagnostics
Short to VCC
Open-load
L
XXXX
L
Hi-Z
Hi-Z
Re-start when
VCC > VUSD +
VUSDhyst (rising)
LX
LX
Refer to
Table 11
H Refer to
H Table 11 External pull-up
Negative
output
voltage
Inductive loads
turn-off
L
X
Refer to
Table 11
<0V
Refer to
Table 11
DocID018837 Rev 8
21/48
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