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VNL5030S5-E PDF Datasheet - fully protected low-side driver - STMicroelectronics

Part Number VNL5030S5-E
Description fully protected low-side driver
Manufacturers STMicroelectronics 
Logo STMicroelectronics Logo 
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Preview ( 28 pages )
		
VNL5030S5-E datasheet, circuit
PowerSSO-12
Features
SO-8
Type
VNL5030J-E
VNL5030S5-E
Vclamp
41 V
RDS(on)
30 mΩ
ID
25 A
Automotive qualified
Drain current: 25 A
ESD protection
Overvoltage clamp
Thermal shutdown
Current and power limitation
Very low standby current
Very low electromagnetic susceptibility
Compliant with European directive 2002/95/EC
Open drain status output
VNL5030J-E
VNL5030S5-E
OMNIFET III
fully protected low-side driver
Datasheet - production data
Description
The VNL5030J-E and VNL5030S5-E are
monolithic devices made using
STMicroelectronics® VIPower® technology,
intended for driving resistive or inductive loads
with one side connected to the battery. Built-in
thermal shutdown protects the chip from
overtemperature and short-circuit. Output current
limitation protects the devices in an overload
condition. In case of long duration overload, the
device limits the dissipated power to a safe level
up to thermal shutdown intervention.Thermal
shutdown, with automatic restart, allows the
device to recover normal operation as soon as a
fault condition disappears. Fast demagnetization
of inductive loads is achieved at turn-off.
Package
PowerSSO-12
SO-8
Table 1. Devices summary
Order codes
Tube
VNL5030J-E
VNL5030S5-E
Tape and reel
VNL5030JTR-E
VNL5030S5TR-E
November 2013
This is information on a product in full production.
DocID022767 Rev 6
1/28
www.st.com

1 page

VNL5030S5-E pdf, schematic
Contents
Contents
VNL5030J-E/ VNL5030S5-E
1 Block diagrams and pins configurations . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.1 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.1 PowerSSO-12 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.2 SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.1 ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.2 PowerSSO-12 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.3 SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.4 PowerSSO-12 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.5 SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2/28 DocID022767 Rev 6

2 Page

VNL5030S5-E equivalent
VNL5030J-E/ VNL5030S5-E
Block diagrams and pins configurations
1 Block diagrams and pins configurations
Figure 1. Block diagram
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Name
INPUT
DRAIN
SOURCE
SUPPLY
STATUS
TAB
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("1($'5
Table 2. Pin function
Function
Voltage controlled input pin with hysteresis, CMOS compatible; it controls output
switch state.
PowerMOS drain.
PowerMOS source and ground reference for the control section.
Supply voltage connected to the signal part (5 V).
Open drain digital diagnostic pin.
Exposed pad. PowerMOS drain.
DocID022767 Rev 6
5/28
27

5 Page

VNL5030S5-E diode, scr
VNL5030J-E/ VNL5030S5-E
Electrical specifications
Table 9. Logic input (continued)
Symbol
Parameter
Test conditions
VICL Input clamp voltage
IIN = 1 mA
IIN = -1 mA
Min. Typ. Max. Unit
5.5
-0.7
7
V
Table 10. Open-load detection
Symbol
Parameter
Test conditions
VOl
Open-load OFF-state voltage
detection threshold
VIN = 0 V
Delay between INPUT falling
td(oloff) edge and STATUS falling edge IOUT = 0 A
in openload condition
Min. Typ. Max. Unit
0.6 1.2 1.7 V
45 425 1100 µs
Symbol
Parameter
IS Supply current
VSCL Supply clamp voltage
Table 11. Supply section
Test conditions
OFF-state; Tj = 25°C;
VIN = VDRAIN = 0 V;
ON-state; VIN = 5 V; VDS = 0 V
ISCL = 1 mA
ISCL = -1 mA
Min. Typ. Max. Unit
10 25
25 65
5.5 7
-0.7
µA
V
Table 12. Switching characteristics(1)
Symbol Parameter
Test conditions
PowerSSO-12
SO-8
Unit
Min. Typ. Max Min. Typ. Max.
td(ON)
td(OFF)
tr
tf
WON
WOFF
Qg
Turn-on delay
time
Turn-off delay
time
Rise time
Fall time
Switching energy
losses at turn-on
Switching energy
losses at turn-off
Total gate charge
RL = 4.5 Ω;
VCC = 13 V(2)
RL = 4.5 Ω;
VCC = 13 V(2)
RL = 4.5 Ω;
VCC = 13 V(2)
RL = 4.5 Ω;
VCC = 13 V(2)
RL = 4.5 Ω;
VCC = 13 V(2)
RL = 4.5 Ω;
VCC = 13 V(2)
VSUPPLY = VIN = 5
V
— 7.6 — — 7.6 — µs
— 18.8 — — 18.8 — µs
— 8 — — 8 — µs
— 9 — — 9 — µs
— 0.068 — — 0.068 — mJ
— 0.077 — — 0.077 — mJ
— 6 — — 6 — nC
1. See Figure 14: Application schematic.
2. See Figure 13: Switching characteristics.
DocID022767 Rev 6
9/28
27

9 Page

VNL5030S5-E transistor, igbt
VNL5030J-E/ VNL5030S5-E
Package and PC board thermal data
Table 16. SO-8 thermal parameters
Area/island (cm2)
Footprint
R1 (°C/W)
0.3
R2 (°C/W)
2.2
R3 (°C/W)
3.5
R4 (°C/W)
21
R5 (°C/W)
16
R6 (°C/W)
58
C1 (W.s/°C)
0.0001
C2 (W.s/°C)
0.002
C3 (W.s/°C)
0.0075
C4 (W.s/°C)
0.045
C5 (W.s/°C)
0.35
C6 (W.s/°C)
1.05
2
28
2
DocID022767 Rev 6
21/28
27

21 Page





Information Total 28 Pages
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VNL5030S5-EThe function of this parts is a fully protected low-side driver.STMicroelectronics
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