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VND7050AJ12 PDF Datasheet - STMicroelectronics

Part Number VND7050AJ12
Description Double channel high-side driver
Manufacturers STMicroelectronics 
Logo STMicroelectronics Logo 
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VND7050AJ12 datasheet, circuit
VND7050AJ12
Double channel high-side driver with CurrentSense analog
feedback for automotive applications
Datasheet - production data
PowerSSO-12
GAPG040515 1112CFT
Features
Max transient supply voltage
VCC
40 V
Operating voltage range
VCC 4 V to 28 V
Minimum cranking supply
voltage (VCC decreasing)
VUSD_Cranking 2.85 V
Typ. on-state resistance
(per Ch)
RON 50
Current limitation (typ)
ILIMH
30 A
Standby current (max)
ISTBY
0.5 µA
Automotive qualified
Extreme low voltage operation for deep cold
cranking applications (compliant with LV124,
revision 2013)
General
Double channel smart high-side driver
with CurrentSense analog feedback
Very low standby current
Compatible with 3 V and 5 V CMOS
outputs
CurrentSense diagnostic functions
Multiplexed analog feedback of: load
current with high precision proportional
current mirror
Overload and short to ground (power
limitation) indication
Thermal shutdown indication
Off-state open-load detection
Output short to VCC detection
Sense enable/ disable
Protections
Undervoltage shutdown
Overvoltage clamp
Load current limitation
Self limiting of fast thermal transients
Loss of ground and loss of VCC
Reverse battery with external
components
Electrostatic discharge protection
Applications
All types of Automotive resistive, inductive
and capacitive loads
Specially intended for Automotive Signal
Lamps (up to P27W or SAE1156 or LED
Rear Combinations)
Description
The device is a double channel high-side driver
manufactured using ST proprietary VIPower®
technology and housed in PowerSSO-12
package. The device is designed to drive 12 V
automotive grounded loads through a 3 V and
5 V CMOS compatible interface, providing
protection and diagnostics.
The device integrates advanced protective
functions such as load current limitation, overload
active management by power limitation and
overtemperature shutdown.
A current sense delivers high precision
proportional load current sense in addition to the
detection of overload and short circuit to ground,
short to VCC and off-state open-load.
A sense enable pin allows off-state diagnosis to
be disabled during the module low-power mode
as well as external sense resistor sharing among
similar devices.
September 2015
DocID027585 Rev 3
This is information on a product in full production.
1/43
www.st.com

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VND7050AJ12 pdf, schematic
Contents
Contents
VND7050AJ12
1 Block diagram and pin description ................................................ 5
2 Electrical specification.................................................................... 7
2.1 Absolute maximum ratings ................................................................ 7
2.2 Thermal data ..................................................................................... 8
2.3 Main electrical characteristics ........................................................... 8
2.4 Waveforms...................................................................................... 18
2.5 Electrical characteristics curves ...................................................... 19
3 Protections..................................................................................... 23
3.1 Power limitation............................................................................... 23
3.2 Thermal shutdown........................................................................... 23
3.3 Current limitation ............................................................................. 23
3.4 Negative voltage clamp................................................................... 23
4 Application information ................................................................ 24
4.1 GND protection network against reverse battery............................. 24
4.1.1 Diode (DGND) in the ground line ..................................................... 25
4.2 Immunity against transient electrical disturbances .......................... 25
4.3 MCU I/Os protection........................................................................ 26
4.4 Behaviour during engine start transients......................................... 26
4.5 CurrentSense - analog current sense ............................................. 28
4.5.1 Principle of CurrenSense signal generation ..................................... 29
4.5.2 Short to VCC and OFF-state open-load detection ........................... 31
5 Maximum demagnetization energy (VCC = 16 V) ........................ 33
6 Package and PCB thermal data .................................................... 34
6.1 PowerSSO-12 thermal data ............................................................ 34
7 Package information ..................................................................... 37
7.1 PowerSSO-12 package information ................................................ 37
7.2 PowerSSO-12 packing information ................................................. 38
7.3 PowerSSO-12 marking information................................................. 40
8 Order codes ................................................................................... 41
9 Revision history ............................................................................ 42
2/43 DocID027585 Rev 3

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VND7050AJ12 equivalent
VND7050AJ12
Block diagram and pin description
1 Block diagram and pin description
Figure 1: Block diagram
Table 1: Pin functions
Name
Function
VCC Battery connection.
OUTPUT0,1 Power output.
GND
Ground connection. Must be reverse battery protected by an external diode/resistor
network.
INPUT0,1
Voltage controlled input pins with hysteresis, compatible with 3 V and 5 V CMOS
outputs. They control output switch state.
CurrentSense
Multiplexed analog sense output pin; it delivers a current proportional to the load
current.
SEn
Active high compatible with 3 V and 5 V CMOS outputs pin; it enables the
CurrentSense diagnostic pin.
SEL
Active high compatible with 3 V and 5 V CMOS outputs pin; it addresses the
CurrentSense multiplexer.
DocID027585 Rev 3
5/43

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VND7050AJ12 diode, scr
VND7050AJ12
Symbol
Parameter
Table 6: Power section
Test conditions
Electrical specification
Min. Typ. Max. Unit
VCC Operating supply voltage
VUSD Undervoltage shutdown
VUSDReset
Undervoltage shutdown
reset
4 13 28
2.85
5V
VUSDhyst
Undervoltage shutdown
hysteresis
0.3
IOUT = 2 A; Tj = 25 °C
RON On-state resistance (1)
IOUT = 2 A; Tj = 150 °C
IOUT = 2 A; VCC = 4 V; Tj = 25 °C
Vclamp Clamp voltage
IS = 20 mA; Tj = -40 °C
IS = 20 mA; 25°C < Tj < 150°C
VCC = 13 V; VIN = VOUT = VSEn = 0 V;
VSEL = 0 V; Tj = 25 °C
ISTBY
Supply current in standby at VCC = 13 V; VIN = VOUT = VSEn = 0 V;
VCC = 13 V (2)
VSEL = 0 V; Tj = 85 °C (3)
VCC = 13 V; VIN = VOUT = VSEn = 0 V;
VSEL = 0 V; Tj = 125 °C
tD_STBY
Standby mode blanking
time
VCC = 13 V; VIN = VOUT = VSEL = 0 V;
VSEn = 5 V to 0 V
IS(ON) Supply current
VCC = 13 V; VSEn = VSEL = 0 V;
VIN0 = 5 V; VIN1 = 5 V; IOUT0 = 0 A;
IOUT1 = 0 A
Control stage current
IGND(ON) consumption in ON state.
All channels active.
VCC = 13 V; VSEn = 5 V; VSEL = 0 V;
VIN0 = 5 V; VIN1 = 5 V; IOUT0 = 2 A;
IOUT1 = 2 A
IL(off)
Off-state output current at
VCC = 13 V(1)
VIN = VOUT = 0 V; VCC = 13 V;
Tj = 25 °C
VIN = VOUT = 0 V; VCC = 13 V;
Tj = 125 °C
VF
Output - VCC diode
voltage(1)
IOUT = -2 A; Tj = 150 °C
50
100
75
38
V
41 46 52
0.5 µA
0.5 µA
3 µA
60 300 550 µA
5 8 mA
12 mA
0 0.01 0.5
µA
03
0.7 V
Notes:
(1)For each channel.
(2)PowerMOS leakage included.
(3)Parameter specified by design; not subject to production test.
Table 7: Switching
VCC = 13 V; -40°C < Tj < 150°C, unless otherwise specified
Symbol
Parameter
Test conditions Min. Typ. Max. Unit
td(on)(1)
Turn-on delay time at Tj = 25°C
td(off)(1)
Turn-off delay time at Tj = 25°C
(dVOUT/dt)on(1) Turn-on voltage slope at Tj = 25°C
(dVOUT/dt)off(1) Turn-off voltage slope at Tj = 25°C
RL = 6.5 Ω
RL = 6.5 Ω
10 60 120
µs
10 40 100
0.1 0.3 0.7
V/µs
0.1 0.32 0.7
DocID027585 Rev 3
9/43

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VND7050AJ12 transistor, igbt
VND7050AJ12
Figure 23: Turn-off voltage slope
Electrical specification
Figure 24: Won vs Tcase
Figure 25: Woff vs Tcase
Figure 26: ILIMH vs. Tcase
Figure 27: OFF-state open-load voltage
detection threshold
Figure 28: Vsense clamp vs Tcase
DocID027585 Rev 3
21/43

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