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PDF UM3204 Data sheet ( Hoja de datos )
| Número de pieza | UM3204 | |
| Descripción | 4-Bit Bidirectional Voltage-Level Translator | |
| Fabricantes | Union Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de UM3204 (archivo pdf) en la parte inferior de esta página. Total 15 Páginas | ||
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UM3204
4-Bit Bidirectional Voltage-Level Translator for
Open-Drain and Push-Pull Application
UM3204H CSP12 1.9×1.4
UM3204Q QFN14 3.5×3.5
UM3204UE TSSOP14
General Description
The UM3204 is quad channel ESD-protected level translator provide the level shifting necessary
to allow data transfer in a multi-voltage system. Externally applied voltages, VCCB and VCCA, set
the logic levels on either side of the device. A low-voltage logic signal present on the VCCA side of
the device appears as a high-voltage logic signal on the VCCB side of the device, and vice-versa.
The UM3204 bidirectional level translator utilizes a transmission-gate based design to allow data
translation in either direction (VCCA↔VCCB) on any single data line. The UM3204 accepts VCCA
from +1.65V to +3.6V and VCCB from +2.3V to +5.5V, making it ideal for data transfer between
low-voltage ASICs / PLDs and higher voltage systems.
The UM3204 enters a three-state output mode to reduce supply current when output enable (OE)
is low. The UM3204 is designed so that the OE input circuit is supplied by VCCA. ±5kV ESD
protection on the VCCB side for greater protection in applications that route signals externally. The
UM3204 is a quad level translator available in CSP12 1.9×1.4, QFN14 3.5×3.5 and TSSOP14
packages.
Applications
Features
SPI, MICROWIRE, and I2C Level Max Data Rates:
Translation
Low-Voltage ASIC Level Translation
Smart Card Readers
Cell-Phone Cradles
Portable POS Systems
Portable Communication Devices
Low-Cost Serial Interfaces
Cell-Phones
GPS
Telecommunications Equipment
24Mbps(Push Pull),
2Mbps(Open Drain)
Bidirectional Level Translation
1.65V to 3.6V on A Port and 2.3V to
5.5V on B Port(VCCA≤VCCB)
±5kV ESD Protection on B Port
No Power-Supply Sequencing Required
VCCA or VCCB Can Be Ramped First
CSP12, QFN14 and TSSOP14 Packages
________________________________________________________________________
http://www.union-ic.com Rev.08 Dec.2014
1/15
1 page  
UM3204
Electrical Characteristics (Note 1, 2, 3)
Over recommended operating free-air temperature range (unless otherwise noted)
Parameter
VOHA
VOLA
VOHB
VOLB
II OE
Test
Conditions
IOH=-20μA
IOL=1mA
IOH=-20μA
IOL=1mA
VI=VCCI or
GND
VCCA
1.65V to 3.6V
1.65V to 3.6V
1.65V to 3.6V
1.65V to 3.6V
1.65V to 3.6V
VCCB
2.3V to 5.5V
2.3V to 5.5V
2.3V to 5.5V
2.3V to 5.5V
2.3V to 5.5V
TA=25℃
Typ Max
±1
IOZ A or B Port
ICCA
OE=VIL
VI=VO=open,
IO=0
1.65V to 3.6V
1.65V to VCCB
3.6V
0V
2.3V to 5.5V
2.3V to 5.5V
0V
5.5V
±1
ICCB
VI=VO=open,
IO=0
1.65V to VCCB
3.6V
0V
2.3V to 5.5V
0V
5.5V
ICCA +ICCB
VI=VO=open,
IO=0
1.65V to 3.6V
2.3V to 5.5V
Ci OE
CiO
A Port
B Port
3.3V
3.3V
3.3V
3.3V
2.5
5
12
Note1. VCCI is the supply voltage associated with the input port.
Note2. VCCO is the supply voltage associated with the output port.
Note3. VCCA must be less than or equal to VCCB and must not exceed 3.6 V.
-40℃ to 85℃
Min Max
VCCA×0.8
0.4
VCCB×0.8
0.4
±2
±2
2.4
2.2
-1
12
-1
1
14.4
3.5
6.5
16.5
Unit
V
V
V
V
μA
μA
μA
μA
μA
pF
pF
________________________________________________________________________
http://www.union-ic.com Rev.08 Dec.2014
5/15
5 Page 
UM3204
Pull-up or Pull-down Resistors on I/O Lines
Each A-port I/O has an internal 10-kΩ pull-up resistor to VCCA, and each B-port I/O has an
internal 10-kΩ pull-up resistor to VCCB. If a smaller value of pull-up resistor is required, an
external resistor must be added from the I/O to VCCA or VCCB (in parallel with the internal 10-kΩ
resistor).
Test Circuits
VCCI
VCCO
VCCI
VCCO
DUT
IN OUT
15pF
1MΩ
DUT
IN OUT
15pF
1MΩ
Data Rate, Pulse Duration, Propagation Delay,
Output Rise and Fall Time measurement
using a push-pull driver
From Output
Under Test
Data Rate, Pulse Duration, Propagation Delay,
Output Rise and Fall Time measurement
using an open-drain driver
50kΩ S1
2*VCCO
Open
15pF
50kΩ
Load Circuit for Enable/Disable
Time Measurement
tw
TEST
TPZL/TPLZ
TPHZ/TPZH
S1
2*VCCO
Open
Input
VCCI/2
VCCI/2
Voltage Waveforms
Pulse Duration
VCCI/2
Input
VCCI/2
tPLH
tPHL
Output
VCCO/2
0.9×VCCO
VCCO/2
0.1×VCCO
tr tf
Voltage Waveforms Propagation
Delay Times
VCCI
0V
VCCI
0V
VOH
VOL
EN 50%
VL
Output
Output
tPZL tPLZ
50%
tPZH tPHZ
50%
GND
10%
90%
HIGH
IMPEDANCE
VOL
VOH
HIGH
IMPEDANCE
Voltage Waveforms Propagation
Disable Times
A. CL includes probe and jig capacitances.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by
the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by
the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR≤100MHz, ZO=50Ω,
dv/dt≥1V/ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. VCCI is the VCC associated with the input port.
I. VCCO is the VCC associated with the output port.
J. All parameters and waveforms are not applicable to all devices.
Figure 2 Load Circuits and Voltage Waveforms
________________________________________________________________________
http://www.union-ic.com Rev.08 Dec.2014
11/15
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet UM3204.PDF ] | |
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