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PDF APL5337 Data sheet ( Hoja de datos )
| Número de pieza | APL5337 | |
| Descripción | Fast Transient Response Linear Regulator | |
| Fabricantes | Anpec Electronics | |
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APL5337
Source and Sink, 2A, Fast Transient Response Linear Regulator
Features
General Description
• Provide Bi-direction Current
Sourcing or Sinking Current Up to 2A
• Built-in Soft-Start
• Power-On-Reset Monitoring on VCNTL Pins
• Fast Transient Response
• Stable with Ceramic Output Capacitors
• ±10mV High System Output Accuracy Over Load
and Temperature Ranges
• Adjustable Output Voltage by External Resistors
• Current-Limit Protection
• On-Chip Thermal Shutdown
• Shutdown for Standby or Suspend Mode
• Simple SOP-8 and SOP-8 with Exposed Pad
(SOP-8P) Packages
• Lead Free and Green Devices Available
(RoHS Compliant)
Applications
• DDRII/III SDRAM Termination Voltage
• Motherboard and VGA Card Power Supplies
• Setop Box
• Low Power DDR3
The APL5337 linear regulator is designed to provide a
regulated voltage with bi-direction output current for DDR-
SDRAM termination voltage. The APL5337 integrates two
power transistors to source or sink load current up to 2A.
It also features internal soft-start, current-limit, thermal
shutdown and enable control functions into a single chip.
The internal soft-start controls the rising rate of the output
voltage to prevent inrush current during start-up. The
current-limit circuit detects the output current and limits
the current during short-circuit or current overload
conditions. The on-chip thermal shutdown provides ther-
mal protection against any combination of overload that
would create excessive junction temperatures.
The output voltage of APL5337 is regulated to track the
voltage on VREF pin. A proper resistor divider connected
to VIN, GND, and VREF pins is used to provide a half
voltage of VIN to VREF pin. In addition, connect an exter-
nal ceramic capacitor and an open-drain transistor to VREF
pin for external soft-start and shutdown control.
Pulling and holding the voltage on VREF below the en-
able voltage threshold shuts down the output. The output
of APL5337 will be high impedance after being shut down
by VREF or the thermal shutdown function.
Pin Configuration
Simplified Application Circuit
VCNTL
+5V
VIN
+1.8V/+1.5V
Shutdown
Enable
1 VIN VCNTL 6
APL5337
3 VREF VOUT 4
GND
2
VOUT
0.9V / 0.75V
VIN 1
GND 2
VREF 3
VOUT 4
Top View of SOP-8
8 VCNTL
7 VCNTL
6 VCNTL
5 VCNTL
VIN 1
GND 2
VREF 3
VOUT 4
8 NC
7 NC
6 VCNTL
5 NC
Top View of SOP-8P
Exposed Pad (connected to GND plane
for better heat dissipation)
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright © ANPEC Electronics Corp.
Rev. A.2 - May., 2010
1
www.anpec.com.tw
1 page  
APL5337
Typical Operating Characteristics
VCNTL Supply Current vs. Junction
Temperature
600
540
480
420
360
300
-50 -25 0 25 50 75 100 125 150
Junction Temperature (oC)
VIN Shutdown Current vs. VIN Supply
Voltage
0.5
VREF=0V
0.4
0.3
0.2
0.1
0
0 0.5 1.0 1.5 2.0
VIN Supply Voltage(V)
Offset Voltage vs. Junction Temperature
2
1.6
1.2
0.8
0.4
0
-50 -25 0 25 50 75 100 125 150
Junction Temperature (oC)
Copyright © ANPEC Electronics Corp.
Rev. A.2 - May., 2010
5
VCNTL Shutdown Current vs.
Junction Temperature
35
30
25
20
15
10
-50 -25 0 25 50 75 100 125 150
Junction Temperature (oC)
VIN Supply Current vs. VIN Supply
Voltage
6 VREF=0.9V
5
4
3
2
1
0
0 0.5 1.0 1.5 2.0
VIN Supply Voltage (V)
www.anpec.com.tw
5 Page 
APL5337
Application Information
Power Sequencing
The input sequence of powers applied for VIN and VCNTL
is not necessary to be concerned.
Reference Voltage
A reference voltage is applied at the VREF pin by a resis-
tor divider between VIN and GND pins. An external by-
pass capacitor is also connected to VREF. The capacitor
and the resistor divider form a low-pass filter to reduce
the inherent reference noise from VIN. The capacitor is a
0.1µF or greater ceramic capacitor and connected as close
to VREF as possible. More capacitance and large resis-
tor divider will increase the soft-start interval. Do not place
any additional loading on this reference input pin.
Input Capacitor
The APL5337 requires proper input capacitors to supply
current surge during stepping load transients to prevent
the input rail from dropping. Because the parasitic induc-
tors from the voltage sources or other bulk capacitors to
the VIN pin limit the slew rate of the input current, more
parasitic inductance needs more input capacitance. For
the APL5337, the total capacitance of input capacitors
value including MLCC and aluminum electrolytic capaci-
tors should be larger than 10µF.
For VCNTL pin, a capacitor of 0.47µF (MLCC) or above is
recommended for noise decoupling.
Output Capacitor
The APL5337 needs a proper output capacitor to main-
tain circuit stability and improve transient response. In
order to insure the circuit stability, a 10µF X5R or X7R
MLCC output capacitor is sufficient at all operating tem-
peratures and it must be placed near the VOUT. The maxi-
mum distance from output capacitor to VOUT must within
10mm. Total output capacitors value including MLCC and
aluminum electrolytic capacitors should be larger than
10µF.
Table 1 provides the suitable output capacitors for
APL5337.
Table 1: Output Capacitor Guide
Vendor
Description
Murata
10µF, 6.3V, X7R, 0805, GRM21BR70J106K
10µF, 6.3V, X5R, 0805, GRM21BR60J106K
Murata website: www.murata.com
Operation Region and Power Dissipation
The APL5337 maximum power dissipation depends on
the thermal resistance and temperature difference be-
tween the die junction and ambient air. The power dissi-
pation PD across the device is:
PD
≤
(TJ − TA
θJA
)
Where (TJ-TA) is the temperature difference between the
junction and ambient air. θJA is the thermal resistance
between junction and ambient air. Assuming the TA=25oC
and maximum TJ=150oC (typical thermal limit threshold),
the maximum power dissipation is calculated as:
PD(max)
=
(150 − 25)
80
= 1.56(W)
For normal operation, do not exceed the maximum junc-
tion temperature of TJ = 125oC. The calculated power dis-
sipation should less than:
PD
=
(125 − 25)
80
= 1.25(W)
PCB Layout Consideration
Figure 1 illustrates the layout. Below is a checklist for
your layout:
1. Please place the input capacitors close to the VIN.
2. Please place the output capacitors close to the VOUT,
a MLCC capacitor larger than 8µF must be placed near
the VOUT. The distance from VOUT to output MLCC
must be less than 10mm.
3. To place APL5337 and output capacitors near the load
is good for load transient response.
4. Large current paths, the bold lines in Figure 1, must
have wide tracks.
Copyright © ANPEC Electronics Corp.
Rev. A.2 - May., 2010
11
www.anpec.com.tw
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet APL5337.PDF ] | |
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