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PDF STF7LN80K5 Data sheet ( Hoja de datos )

Número de pieza STF7LN80K5
Descripción N-channel Power MOSFET
Fabricantes STMicroelectronics 
Logotipo STMicroelectronics Logotipo



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No Preview Available ! STF7LN80K5 Hoja de datos, Descripción, Manual

STF7LN80K5
N-channel 800 V, 0.95 Ω typ., 5 A MDmesh™ K5
Power MOSFET in a TO-220FP package
Datasheet - production data
TO-220FP
Figure 1: Internal schematic diagram
D(2)
G(1)
Features
Order code
STF7LN80K5
VDS
800 V
RDS(on) max.
1.15 Ω
ID
5A
Industry’s lowest RDS(on) x area
Industry’s best figure of merit (FoM)
Ultra-low gate charge
100% avalanche tested
Zener-protected
Applications
Switching applications
Description
This very high voltage N-channel Power
MOSFET is designed using MDmesh™ K5
technology based on an innovative proprietary
vertical structure. The result is a dramatic
reduction in on-resistance and ultra-low gate
charge for applications requiring superior power
density and high efficiency.
S(3)
Order code
STF7LN80K5
AM15572v1_no_tab
Table 1: Device summary
Marking
Package
7LN80K5
TO-220FP
Packing
Tube
December 2015
DocID028769 Rev 1
This is information on a product in full production.
1/13
www.st.com

1 page




STF7LN80K5 pdf
STF7LN80K5
Symbol Parameter
Table 8: Source-drain diode
Test conditions
Electrical characteristics
Min. Typ. Max. Unit
ISD
ISDM(1)
VSD(2)
Source-drain current
Source-drain current
(pulsed)
Forward on voltage
ISD = 5 A, VGS = 0 V
- 5A
- 20 A
- 1.6 V
trr Reverse recovery time ISD = 5 A, di/dt = 100 A/µs,
Qrr
Reverse recovery
charge
VDD = 60 V
See Figure 16: "Test circuit for
IRRM
Reverse recovery
current
inductive load switching and diode
recovery times"
- 276
- 2.13
- 15.4
ns
µC
A
trr Reverse recovery time ISD = 5 A, di/dt = 100 A/µs
Qrr
Reverse recovery
charge
VDD = 60 V, Tj = 150 °C
See Figure 16: "Test circuit for
IRRM
Reverse recovery
current
inductive load switching and diode
recovery times"
- 402
- 2.79
- 13.9
ns
µC
A
Notes:
(1)Pulse width limited by safe operating area
(2)Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Symbol
V(BR)GSO
Table 9: Gate-source Zener diode
Parameter
Test conditions
Gate-source breakdown voltage IGS= ± 1mA, ID= 0 A
Min. Typ. Max. Unit
30 -
-V
The built-in back-to-back Zener diodes have been specifically designed to enhance the
ESD capability of the device. The Zener voltage is appropriate for efficient and cost-
effective intervention to protect the device integrity. These integrated Zener diodes thus
eliminate the need for external components.
DocID028769 Rev 1
5/13

5 Page





STF7LN80K5 arduino
STF7LN80K5
Dim.
A
B
D
E
F
F1
F2
G
G1
H
L2
L3
L4
L5
L6
L7
Dia
Package information
Table 10: TO-220FP package mechanical data
mm
Min.
Typ.
Max.
4.4 4.6
2.5 2.7
2.5 2.75
0.45 0.7
0.75 1
1.15 1.70
1.15 1.70
4.95 5.2
2.4 2.7
10 10.4
16
28.6
9.8
30.6
10.6
2.9 3.6
15.9 16.4
9 9.3
3 3.2
DocID028769 Rev 1
11/13

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