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PDF STD7LN80K5 Data sheet ( Hoja de datos )

Número de pieza STD7LN80K5
Descripción N-channel Power MOSFET
Fabricantes STMicroelectronics 
Logotipo STMicroelectronics Logotipo



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No Preview Available ! STD7LN80K5 Hoja de datos, Descripción, Manual

STD7LN80K5
N-channel 800 V, 0.95 Ω typ., 5 A MDmesh™ K5
Power MOSFET in a DPAK package
Datasheet - production data
Features
Order code
STD7LN80K5
VDS
800 V
RDS(on) max.
1.15 Ω
ID
5A
DPAK
Figure 1: Internal schematic diagram
D(2, TAB)
G(1)
Industry’s lowest RDS(on) x area
Industry’s best figure of merit (FoM)
Ultra-low gate charge
100% avalanche tested
Zener-protected
Applications
Switching applications
Description
This very high voltage N-channel Power
MOSFET is designed using MDmesh™ K5
technology based on an innovative proprietary
vertical structure. The result is a dramatic
reduction in on-resistance and ultra-low gate
charge for applications requiring superior power
density and high efficiency.
Order code
STD7LN80K5
S(3)
AM15572v1_tab
Table 1: Device summary
Marking
Package
7LN80K5
DPAK
Packing
Tape and reel
December 2015
DocID028774 Rev 1
This is information on a product in full production.
1/16
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STD7LN80K5 pdf
STD7LN80K5
Symbol
Parameter
Table 8: Source drain diode
Test conditions
Electrical characteristics
Min. Typ. Max. Unit
ISD
ISDM(1)
VSD (2)
trr
Qrr
IRRM
Source-drain current
Source-drain current
(pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery
charge
Reverse recovery
current
ISD= 5 A, VGS = 0 V,
ISD = 5 A, di/dt = 100 A/µs,
VDD = 60 V (see Figure 16: "Test
circuit for inductive load
switching and diode recovery
times")
- 5A
- 20 A
- 1.6 V
- 276
ns
- 2.13
µC
- 15.4
A
trr Reverse recovery time
Qrr
Reverse recovery
charge
IRRM
Reverse recovery
current
ISD = 5 A, di/dt = 100 A/µs,
VDD = 60 V, Tj = 150 °C
(see Figure 16: "Test circuit for
inductive load switching and
diode recovery times")
- 402
- 2.79
- 13.9
ns
µC
A
Notes:
(1)Pulse width is limited by safe operating area
(2)Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Symbol
V(BR)GSO
Table 9: Gate-source Zener diode
Parameter
Test conditions
Gate-source breakdown voltage IGS = ±1 mA, ID = 0 A
Min. Typ. Max. Unit
30 -
V
The built-in back-to-back Zener diodes are specifically designed to enhance the ESD
performance of the device. The Zener voltage facilitates efficient and cost-effective device
integrity protection,thus eliminating the need for additional external componentry.
DocID028774 Rev 1
5/16

5 Page





STD7LN80K5 arduino
STD7LN80K5
Dim.
A
A1
A2
b
b4
c
c2
D
D1
E
E1
e
e1
H
L
L1
L2
L4
R
V2
Package information
Table 10: DPAK (TO-252) type A2 mechanical data
mm
Min.
Typ.
Max.
2.20 2.40
0.90 1.10
0.03 0.23
0.64 0.90
5.20 5.40
0.45 0.60
0.48
6.00
4.95 5.10
0.60
6.20
5.25
6.40 6.60
5.10 5.20
2.16 2.28
4.40
5.30
2.40
4.60
9.35 10.10
1.00 1.50
2.60 2.80
0.65 0.80
3.00
0.95
0.60
0.20
1.00
DocID028774 Rev 1
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