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PDF IRMCF171 Data sheet ( Hoja de datos )
| Número de pieza | IRMCF171 | |
| Descripción | High Performance Sensorless Motor Control IC | |
| Fabricantes | International Rectifier | |
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Release Datasheet Rev. A
IRMCF171
High Performance Sensorless Motor Control IC
Description
IRMCF171 is a high performance flash memory based motion control IC designed primarily for appliance
applications. IRMCF171 is designed to achieve low cost yet high performance control solutions for advanced
inverterized appliance motor control. IRMCF171 contains two computation engines integrated into one monolithic
chip. One is the Flexible Motion Control Engine (MCETM) for sensorless control of permanent magnet or induction
motors; the other is an 8-bit high-speed microcontroller (8051). The user can program a motion control algorithm
by connecting control elements using a graphic compiler. Key components of the complex sensorless control
algorithms, such as the Angle Estimator, are provided as complete pre-defined control blocks. A unique
analog/digital circuit and algorithm fully supports single or leg shunt current reconstruction. The MCE and 8051
microcontroller communicate via dual port RAM for signal monitoring and command input. An advanced graphic
compiler for the MCETM is seamlessly integrated into the MATLAB/Simulink environment, while third party JTAG-
based emulator tools are supported for 8051 software development including a flash programmer. IRMCF171
comes in a 48 pin QFP package.
Features
MCETM (Flexible Motion Control Engine) -
Dedicated computation engine for high efficiency
sinusoidal sensorless motor control
Built-in hardware peripheral for single or two shunt
current feedback reconstruction and analog
circuits
Supports induction machine and both interior and
surface permanent magnet motor sensorless
control
Loss minimization Space Vector PWM
Two-channel analog output (PWM)
Embedded 8-bit high speed microcontroller (8051)
for flexible I/O and man-machine control
JTAG programming port for emulation/debugger
Serial communication interface (UART)
I2C/SPI serial interface
Three general purpose timers/counters
Two special timers: periodic timer, capture timer
Watchdog timer with independent internal clock
Internal 64 Kbyte flash memory
5V tolerant I/O
3.3V single supply
Product Summary
Maximum clock input (fcrystal)
Maximum Internal clock (SYSCLK)
Maximum 8051 clock (8051CLK)
Sensorless control computation time
MCETM computation data range
8051 Program Flash
805/MCE Data RAM
MCE Program RAM
GateKill latency (digital filtered)
PWM carrier frequency
A/D input channels
A/D converter resolution
A/D converter conversion speed
Analog output (PWM) resolution
UART baud rate (typ)
Number of digital I/O (max)
Package (lead free)
Typical 3.3V operating current
60 MHz
120MHz
30MHz
35 μsec@100MHz
16 bit signed
52KB
4KB
12KB
2 μsec
20 bits/ SYSCLK
7
12 bits
2 μsec
8 bits
57.6K bps
14
QFP48
30mA
Base Part Number
IRMCF171
IRMCF171
Package Type
LQFP48
LQFP48
Standard Pack
Form
Tape and Reel
Quantity
2000
Tray
2500
Orderable Part Number
IRMCF171TR
IRMCF171TY
1 www.irf.com
© 2013 International Rectifier
April 20, 2013
1 page  
IRMCF171
1 Overview
IRMCF171 is a new generation International Rectifier integrated circuit device primarily designed as a one-chip
solution for complete inverterized appliance motor control applications. Unlike a traditional microcontroller or
DSP, the IRMCF171 provides a built-in closed loop sensorless control algorithm using the unique flexible Motion
Control Engine (MCETM) for permanent magnet motors as well as induction motors. The MCETM consists of a
collection of control elements, motion peripherals, a dedicated motion control sequencer and dual port RAM to
map internal signal nodes. IRMCF171 also employs a unique single shunt current reconstruction circuit in
addition to two leg shunt current sensing circuit to eliminate additional analog/digital circuitry and enables a direct
shunt resistor interface to the IC. Motion control programming is achieved using a dedicated graphical compiler
integrated into the MATLAB/SimulinkTM development environment. Sequencing, user interface, host
communication, and upper layer control tasks can be implemented in the 8051 high-speed 8-bit microcontroller.
The 8051 microcontroller is equipped with a JTAG port to facilitate emulation and debugging tools. Figure 1
shows a typical application schematic using the IRMCF171.
IRMCF171 contains 64 Kbytes of Flash program memory. The IRMCK171 contains 32 Kbytes OTP memory and
is intended for high volume production purposes while the IRMCF171 is intended for flexible volume production.
Both the Flash and ROM versions come in a 48-pin QFP package with identical pin configuration to facilitate PC
board layout and transition to mass production.
Host
Communication
(RS232C)
Passive
EMI
Fillter
Appliance PM
motor Drive
Galvanic
isolation
15V
Gate signal
IRMCF171
Power
Supply
3 .3V
IRS2336 D
Optional
EEPROM
2
8
Digital I/O
6
Analog Input
Figure 1. Typical Application Block Diagram Using IRMCF171
PM motor
IPM or SPM
Or
IM motor
5 www.irf.com
© 2013 International Rectifier
April 20, 2013
5 Page 
IRMCF171
P5.2/TMS
Input port 5.2, configured as JTAG port by default
Analog Output Interface
P2.7/AOPWM1 Input/output, can be configured as 8-bit PWM output 1 with programmable carrier
frequency
P3.1/AOPWM2 Input/output, can be configured as 8-bit PWM output 2 with programmable carrier
frequency
Crystal Interface
XTAL0
XTAL1
Input, connected to crystal
Output, connected to crystal
Reset Interface
RESET
I2C Interface
SCL/SO-SI
SDA/CS0
I2C/SPI Interface
SCL/SO-SI
SDA/CS0
P1.3/SYNC/SCK
P3.0/INT2/CS1
Input and Output, system reset, doesn’t require external RC time constant
Output, I2C clock output, or SPI data
Input/output, I2C Data line or SPI chip select 0
Output, I2C clock output, or SPI data
Input/output, I2C data line or SPI chip select 0
Input/output port 1.3, can be configured as SYNC output or SPI clock output
Input/output port 3.0, can be configured as INT2 input or SPI chip select 1
4.2 Motion Peripheral Interface Group
PWM
PWMUH
PWMUL
PWMVH
PWMVL
PWMWH
PWMWL
PFCPWM
Output, PWM phase U high side gate signal, internally pulled down by 58kΩ,
configured high true at a power up
Output, PWM phase U low side gate signal, internally pulled down by 58kΩ,
configured high true at a power up
Output, PWM phase V high side gate signal, internally pulled down by 58kΩ,
configured high true at a power up
Output, PWM phase V low side gate signal, internally pulled down by 58kΩ,
configured high true at a power up
Output, PWM phase W high side gate signal, internally pulled down by 58kΩ,
configured high true at a power up
Output, PWM phase W low side gate signal, internally pulled down by 58kΩ,
configured high true at a power up
Output, PFCPWM output signal, internally pulled up by 70kΩ, configured low true at a
power up
Fault
GATEKILL
Input, upon assertion this negates all six PWM signals, active low, internally pulled up
by 70kΩ
4.3 Analog Interface Group
AVSS
Analog power return, (analog internal 1.8V power is shared with VDDCAP)
AREF
0.6V buffered output
CMEXT
Unbuffered 0.6V, input to the AREF buffer, capacitor needs to be connected.
IFB+
Input, Operational amplifier positive input for shunt resistor current sensing
11 www.irf.com
© 2013 International Rectifier
April 20, 2013
11 Page | ||
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| PDF Descargar | [ Datasheet IRMCF171.PDF ] | |
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