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PDF CE2826 Data sheet ( Hoja de datos )

Número de pieza CE2826
Descripción 6-Channel Audio Codec
Fabricantes CEI Microelectronics 
Logotipo CEI Microelectronics Logotipo



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No Preview Available ! CE2826 Hoja de datos, Descripción, Manual

Microelectronics
CE2826
6-Channel Audio Codec, 24-bit, 192kHz
DESCRIPTION
The CE2826 is a mixed signal CMOS monolithic audio
Codec. It contains six multi-bit sigma delta DAC and a
stereo ADC, Ideal for DVD and audio processing
application.
The DAC consists of 128-time interpolation filters, 3rd
order multi-bit Σ∆ modulators, switch capacitors and
analog reconstruction filters. The Σ∆ converter offers
superior differential linearity, with minimum distortion due
to component mis-match. high tolerance to clock jitter.
Additionally it includes separated digital volume control
for each channel.
FEATURES
• Six Channel Audio DAC.
- 104 dB SNR (A Weighted).
- -91 dB THD + N Ratio (A Weighted).
- 32K - 192 KHz. Sampling Rates.
- On -chip Reconstruction Filters.
- Independent Digital Volume Control.
• Stereo Audio ADC.
- Up to 96K sampling Rate.
• I2S, Left and Right Justified Digital I/F Formats.
• 2-wire Serial Control Interface.
• 3.3 Volt Power Supply.
The ADC utilizes cascaded Σ∆ architecture. The internal
digital filter has a 20K bandwidth. It support sampling
frequency up to 96K Hz.
Applications
• Digital Surround Sound For Home Theatre
• DVD
• Car Audio.
XCK
LRCK
BCK
77
78
DIN1
DIN2
DIN3
80
80
77
DOUT
77
Clock Rate
Detect'n
DIGITAL
AUDIO
I/F
SDA SCL
Control Interface
CE2826
Σ∆
Mod.
D/A
D/A
INTERPOLATION
FILTER
Σ∆
Mod.
D/A
D/A
Σ∆
Mod.
D/A
D/A
HIGH PASS
FILTER
DECIMATION
FILTER
A/D
AR1
AL1
AR2
AL2
AR3
AL3
AINR
AINL
CEI Microelectronics Co. Ltd.
1-20
February 3, 2005

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CE2826 pdf
CE2826
PIN DESCRIPTION (Continued)
Pin Name
Analog
DAVH
DAVL
AR1
AL1
AR2
AL2
AR3
AL3
AVDD
AGND
AINR
AINL
ADVH
ADVL
VCM
AGND
AVDD
Pin # Type
Description
28 +3.3V DAC positive reference voltage. It should be connected to AVDD with a 22 uF
capacitor in parallel with a 0.1 uF.
27 GND DAC negative reference voltage. It should be connected to AGND.
26 O Analog right channel 1 output
25 O Analog left channel 1 output
24 O Analog right channel 2 output
23 O Analog left channel 2 output
22 O Analog right channel 3 output
21 O Analog left channel 3 output
20 +3.3V DAC power supply.
19 GND DAC ground pin.
18 I ADC right channel input. Input resistance is 20K Ohm
17 I ADC left channel input. Input resistance is 20K Ohm
16 I ADC buffered reference voltage output. It should be Connected to a 22 uF capacitor in
parallel with a 0.1 uF. Signal level is AVDD/2.
15 I/O Analog negative reference voltage. It should be tied to AGND.
14 I/O Analog circuit common mode voltage de-coupling pin.
13 GND ADC ground pin.
12 +3.3V ADC power supply
5-20 February 3, 2005

5 Page





CE2826 arduino
CE2826
Control Register 1 (ADRS=hex01, default=hex80)
ADDR[3:0]
Hex 01
Default Value
BIT 7
AUTODET
1
BIT 6
FS384
0
CREG1[7:0]
BIT 5
CKDIV4
0
BIT 4
CKDIV2
0
BIT 3
ADCEN
0
BIT 2
MUTE56
0
BIT 1
MUTE34
0
BIT 0
MUTE12
0
AUTODET Automatically detects the serial audio input data sampling rate clock frequency.
0: - do not use auto-detect
1: - automatically detects the serial audio input data sampling rate and clock frequency.
FS384: 384 fs or 256 fs control for the PLL clock output. This bit is recognized only when “AUTODET” bit is set to ‘0’
otherwise the input format is automatically detected.
0: the PLL takes the reference clock and multiplies it by 2 to generate a 512 bit clock
1: the PLL takes the reference clock and multiplies it by 4/3 to generate a 512 bit clock
CKDIV4: Clock divider enable control.This bit is recognized only when “AUTODET” bit is set to ‘0’ otherwise the input
format is automatically detected.
0: do not enable input clock divided by 4
1: enable input clock divided by 4
CKDIV2: Clock divider enable control. This bit is recognized only when “AUTODET” bit is set to ‘0’ otherwise the input
format is automatically detected.
0: do not enable input clock divided by 2
1: enable input clock divided by 2
ADCEN: Enable the ADC.
0: ADC is disabled.
1: ADC is enabled.
MUTE56: Mute control for channels 5 and 6
0: do not mute channels 5 and 6
1: simultaneously mute channels 5 and 6
MUTE34: Mute control for channels 3 and 4
0: do not mute channels 3 and 4
1: simultaneously mute channels 3 and 4
MUTE12: Mute control for channels 1 and 2
0: do not mute channels 1 and 2
1: simultaneously mute channels1 and2
11-20
February 3, 2005

11 Page







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