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What is SI516?

This electronic component, produced by the manufacturer "Silicon Laboratories", performs the same function as "DUAL FREQUENCY VOLTAGE-CONTROLLED CRYSTAL OSCILLATOR (VCXO)".


SI516 Datasheet PDF - Silicon Laboratories

Part Number SI516
Description DUAL FREQUENCY VOLTAGE-CONTROLLED CRYSTAL OSCILLATOR (VCXO)
Manufacturers Silicon Laboratories 
Logo Silicon Laboratories Logo 


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Si516
DUAL FREQUENCY VOLTAGE-CONTROLLED
CRYSTAL OSCILLATOR (VCXO) 100 kHZ TO 250 MHZ
Features
Supports any frequency from
Available CMOS, LVPECL,
100 kHz to 250 MHz
LVDS, and HCSL outputs
Two selectable output frequencies Optional 1:2 CMOS fanout buffer
Low-jitter operation
3.3 and 2.5 V supply options
Short lead times: <2 weeks
Industry-standard 3.2 x 5.0 mm
AT-cut fundamental mode crystal
and 5 x 7 mm package/pinouts
ensures high reliability/low aging Pb-free/RoHS-compliant
High power supply noise rejection Selectable Kv (60, 90, 120,
1% control voltage linearity
150 ppm/V)
Applications
SONET/SDH/OTN
PON
Low Jitter PLLs
xDSL
Description
Broadcast video
Telecom
Switches/routers
FPGA/ASIC clock generation
The Si516 dual frequency VCXO utilizes Silicon Laboratories' advanced PLL
technology to provide any frequency from 100 kHz to 250 MHz. Unlike a
traditional VCXO where a different crystal is required for each output
frequency, the Si516 uses one fixed crystal and Silicon Labs’ proprietary
synthesizer to generate any frequency across this range. This IC-based
approach allows the crystal resonator to provide enhanced reliability,
improved mechanical robustness, and excellent stability. In addition, this
solution provides superior control voltage linearity and supply noise
rejection, improving PLL stability and simplifying low jitter PLL design in
noisy environments. The Si516 is factory-configurable for a wide variety of
user specifications, including frequency, supply voltage, output format,
tuning slope and stability. Specific configurations are factory-programmed at
time of shipment, eliminating long lead times and non-recurring engineering
charges associated with custom frequency oscillators.
Functional Block Diagram
Si5602
Ordering Information:
See page 14.
Pin Assignments:
See page 12.
Vc 1
FS 2
GND 3
6 VDD
5 NC
4 CLK
CMOS Dual VCXO
Vc 1
6 VDD
FS 2
5 CLK–
GND 3
4 CLK+
LVPECL/LVDS/HCSL/Dual CMOS
Dual VCXO
Rev. 1.0 6/12
Copyright © 2012 by Silicon Laboratories
Si516

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SI516 equivalent
Si516
Table 2. Vc Control Voltage Input
VDD = 2.5 or 3.3 V ±10%, TA = –40 to +85 oC
Parameter
Control Voltage Range
Control Voltage Tuning Slope
(10 to 90% VDD)
Kv Variation
Symbol
VC
Kv
Kv_var
Control Voltage Linearity
Modulation Bandwidth
Vc Input Impedance
LVC
BW
ZVC
Test Condition
Ordering option
BSL
Min Typ Max
0.1 x VDD VDD/2 0.9 x VDD
60, 90, 120, 150
Unit
V
ppm/V
— — ±10 %
–5 ±1 +5 %
— 10 — kHz
— 100 — k
Table 3. Output Clock Frequency Characteristics
VDD = 2.5 or 3.3 V ±10%, TA = –40 to +85 oC
Parameter
Symbol
Test Condition
Nominal Frequency
Temperature Stability
Aging
FO CMOS, Dual CMOS
FO LVDS/LVPECL/HCSL
ST TA = –40 to +85 oC
A Frequency drift over 10-year life
Minimum Absolute Pull Range APR
Ordering option
Startup Time
Disable Time
Enable Time
Settling Time after FS Change
TSU
TD
TD
tFRQ
Minimum VDD until output fre-
quency (FO) within specification
FO > 10 MHz
FO < 10 MHz
FO > 10 MHz
FO < 10 MHz
Min Typ Max
0.1 — 212.5
0.1 — 250
–20 — +20
— — ±8.5
±30, ±50,±80, ±100
— — 10
——
5
— — 40
— — 20
— — 60
— — 10
Unit
MHz
MHz
ppm
ppm
ppm
ms
µs
µs
µs
µs
ms
Rev. 1.0
5


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