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PDF ASM2I99447 Data sheet ( Hoja de datos )
| Número de pieza | ASM2I99447 | |
| Descripción | 3.3V/2.5V 1:9 LVCMOS Clock Fanout Buffer | |
| Fabricantes | Alliance Semiconductor | |
| Logotipo |  |
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May 2005
rev 0.3
ASM2I99447
3.3V/2.5V 1:9 LVCMOS Clock Fanout Buffer
Features
9 LVCMOS Compatible Clock Outputs
2 Selectable, LVCMOS Compatible Inputs
Maximum Clock Frequency of 350 MHz
Maximum Clock Skew of 150 pS
Synchronous Output Stop in Logic Low State
Eliminates Output Runt Pulses
High–Impedance Output Control
3.3V or 2.5V Power Supply
Drives up to 18 Series Terminated Clock Lines
Ambient Temperature Range –40°C to +85°C
32 Lead LQFP and TQFP Packaging
Supports Clock Distribution in Networking,
Telecommunications and Computer Applications
Pin and Function Compatible to MPC947 and
MPC9447
Functional Description
The ASM2I99447 is a 3.3V or 2.5V compatible, 1:9 clock
fanout buffer targeted for high performance clock tree
applications. With output frequencies up to 350 MHz and
output skews less than 150 pS, the device meets the needs
of most demanding clock applications.
ASM2I99447 is specifically designed to distribute LVCMOS
compatible clock signals up to a frequency of 350 MHz.
Each output provides a precise copy of the input signal with
a near zero skew. The outputs buffers support driving of
50Ω terminated transmission lines on the incident edge:
each is capable of driving either one parallel terminated or
two series terminated transmission lines.
Two selectable independent LVCMOS compatible clock
inputs are available, providing support of redundant clock
source systems. The ASM2I99447 CLK_STOP control is
synchronous to the falling edge of the input clock. It allows
the start and stop of the output clock signal only in a logic
low state, thus eliminating potential output runt pulses.
Applying the OE control will force the outputs into high
impedance mode.
All inputs have an internal pull–up or pull–down resistor
preventing unused and open inputs from floating. The
device supports a 2.5V or 3.3V power supply and an
ambient temperature range of –40°C to +85°C. The
ASM2I99447 is pin and function compatible but
performance enhanced to the MPC947 and MPC9447.
Alliance Semiconductor
2575, Augustine Drive • Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com
Notice: The information in this document is subject to change without notice.
1 page  
May 2005
ASM2I99447
rev 0.3
Table 8. AC Characteristics (VCC = 2.5V ± 5%, TA = –40°C to +85°C)1
Symbol
fref
fmax
fP,REF
tr, tf
tPLH/HL
tPLZ, HZ
tPZL, ZH
Characteristics
Input Frequency
Output frequency
Reference Input Pulse Width
CCLK0, CCLK1 Input Rise/Fall Time
Propagation Delay CCLK0 or CCLK1 to any Q
Output Disable Time
Output Enable Time
Min
0
0
1.4
1.7
Typ
Max
350
350
1.02
4.4
11
11
Unit
MHz
MHz
nS
nS
nS
nS
nS
Condition
0.7 to 1.7V
tS Setup Time CCLK0 or CCLK1 to CLK_STOP3
0.0
nS
tH
Hold Time
CCLK0 or CCLK1 to CLK_STOP3
1.0
nS
tsk(O)
Output-to-Output Skew
150 pS
tsk(PP)
tSK(P)
DCQ
tr, tf
Device-to-Device Skew
Output Pulse Skew4
Output Duty Cycle
Output Rise/Fall Time
2.7 nS
fQ<350 MHz
45
50
200
55
pS
% DCREF=50%
0.1 1.0 nS 0.6 to 1.8V
tJIT(CC) Cycle-to-cycle jitter
RMS (1 σ)
TBD
pS
Note: 1. AC characteristics apply for parallel output termination of 50Ω to VTT.
2. Violation of the 1.0 nS maximum input rise and fall time limit will affect the device propagation delay, device-to-device skew, reference input pulse
width, output duty cycle and maximum frequency specifications.
3. Setup and hold times are referenced to the falling edge of the selected clock signal input.
4. Output pulse skew is the absolute difference of the propagation delay times: | tPLH - tPHL |.
3.3V/2.5V 1:9 LVCMOS Clock Fanout Buffer
Notice: The information in this document is subject to change without notice.
5 of 14
5 Page 
May 2005
rev 0.3
Package Information
32-lead TQFP Package
ASM2I99447
SECTION A-A
Symbol
A
A1
A2
D
D1
E
E1
L
L1
T
T1
b
b1
R0
a
e
Dimensions
Inches
Millimeters
Min Max Min Max
….
0.0472
…
1.2
0.0020
0.0059
0.05
0.15
0.0374
0.0413
0.95
1.05
0.3465
0.3622
8.8
9.2
0.2717
0.2795
6.9
7.1
0.3465
0.3622
8.8
9.2
0.2717
0.2795
6.9
7.1
0.0177
0.0295
0.45
0.75
0.03937 REF
1.00 REF
0.0035
0.0079
0.09
0.2
0.0038
0.0062
0.097
0.157
0.0118
0.0177
0.30
0.45
0.0118
0.0157
0.30
0.40
0.0031
0.0079
0.08
0.2
0° 7° 0° 7°
0.031 BASE
0.8 BASE
3.3V/2.5V 1:9 LVCMOS Clock Fanout Buffer
Notice: The information in this document is subject to change without notice.
11 of 14
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet ASM2I99447.PDF ] | |
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| ASM2I99447 | 3.3V/2.5V 1:9 LVCMOS Clock Fanout Buffer | Alliance Semiconductor |
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