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What is TEA1832LTS?

This electronic component, produced by the manufacturer "NXP Semiconductors", performs the same function as "GreenChip SMPS control IC".


TEA1832LTS Datasheet PDF - NXP Semiconductors

Part Number TEA1832LTS
Description GreenChip SMPS control IC
Manufacturers NXP Semiconductors 
Logo NXP Semiconductors Logo 


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TEA1832LTS
GreenChip SMPS control IC
Rev. 1 — 15 December 2014
Product data sheet
1. General description
The TEA1832LTS is a low-cost Switched Mode Power Supply (SMPS) controller IC
intended for flyback topologies. The TEA1832LTS operates in peak current and frequency
control mode. Frequency jitter has been implemented to reduce ElectroMagnetic
Interference (EMI). Slope compensation is integrated for Continuous Conduction Mode
(CCM) operation.
The TEA1832LTS IC features OverPower Protection (OPP). The controller accepts an
overpower situation up to 200 % for a limited amount of time.
Mains undervoltage protection (brownin/brownout), output OverVoltage Protection (OVP),
and OverTemperature Protection (OTP) can be implemented using a minimal number of
external components.
At low-power levels, the primary peak current is set to 22 % of the maximum peak current.
The switching frequency is reduced to limit the switching losses. The combination of fixed
frequency operation at high output power and frequency reduction at low output power
provides high efficiency over the total load range.
The TEA1832LTS makes the design of low-cost, highly efficient and reliable supplies
easier by requiring a minimum number of external components. The device is especially
suited for medium power applications.
2. Features and benefits
SMPS controller IC enabling low-cost applications
Large input voltage range (10.5 V to 36 V)
Integrated OverVoltage Protection (OVP) on the VCC pin
Accurate OverVoltage Protection (OVP) via the ISENSE pin
Dedicated burst mode, allowing a low VCC capacitor value
Very low supply current during start-up and restart (11 A typical)
Low supply current during normal operation (0.58 mA typical without load)
Internal overpower time-out
Overpower protection including high/low line compensation
Fixed switching frequency with frequency jitter to reduce EMI
Frequency reduction with fixed minimum peak current to maintain high efficiency at
low output power levels
Peak power operation up to 200 % by frequency increase and peak current increase
Slope compensation for CCM operation

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TEA1832LTS equivalent
NXP Semiconductors
TEA1832LTS
GreenChip SMPS control IC
7. Functional description
7.1 General control
The TEA1832LTS contains a controller for a flyback circuit. A typical configuration is
shown in Figure 3.
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Fig 3. TEA1832LTS typical configuration
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7.2 Start-up and UnderVoltage LockOut (UVLO)
Initially, the capacitor on the VCC pin, C3, is charged from the high-voltage mains via
resistor R1.
As long as the voltage on the VCC pin is below Vstartup, the IC current consumption is low
(11 A typical). When the voltage on the VCC pin reaches Vstartup, the IC first checks the
PROTECT pin. Only when the current exceeds the brownin level (Imains(bi)) during mains
detect and the voltage surpasses Vdet(PROTECT) during external OTP measurement the IC
starts switching. An internal soft-start time of 3.5 ms allows the ISENSE peak voltage to
increase gradually to prevent audible noise. In a typical application, the auxiliary winding
of the transformer takes over the supply voltage.
If a protection is triggered, the controller stops switching. Depending on the protection
triggered, it either causes a restart or latches the converter to an off-state.
The brownin/brownout and the maximum duty cycle protections cause a safe restart.
OPP, UVLO, the internal and external OVP, and the internal and external OTP latch the
converter to an off-state.
A restart protection disables the switching of the IC. The supply voltage of the IC drops to
the UVLO level. When the UVLO level is reached, the IC switches to power-down mode,
where it consumes a low supply current (11 A typical). The VCC capacitor is recharged
via R1 until the VCC start-up level is reached. The IC starts switching again.
When a latched protection is triggered, the TEA1832LTS immediately enters power-down
mode. The VCC pin is clamped to a voltage just above the latch protection reset voltage
(Vrst(latch) + 1 V).
TEA1832LTS
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 December 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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