DataSheet39.com

A25LQ32A PDF Datasheet - Dual/Quad-I/O Serial Flash Memory - AMIC

Part Number A25LQ32A
Description Dual/Quad-I/O Serial Flash Memory
Manufacturers AMIC 
Logo AMIC Logo 
Preview
Preview ( 30 pages )
		
A25LQ32A datasheet, circuit
A25LQ32A Series
32Mbit, 3V Suspend/Resume, Dual/Quad-I/O Serial Flash Memory
with 100MHz Uniform 4KB Sectors
Document Title
32Mbit, 3V Suspend/Resume, Dual/Quad-I/O Serial Flash Memory with 100 MHz Uniform
4KB Sectors
Revision History
Rev. No.
0.0
1.0
1.1
1.2
1.3
1.4
History
Initial issue
Final version release
P.21: For instruction BB, remove mode bit function
P.46: For SFDP, change data of byte 1E
Add 8-pin DIP package type
Change tSE(typ.) from 150ms to 80ms
Change tSE(max.) from 280ms to 200s
Change tBE(typ,) from 0.7s to 0.5s
Change tCE(typ.) from 40s to 32s
P50: Change ICC6 & ICC7(max.) from 15mA to 25mA
Issue Date
June 8, 2011
July 18, 2011
August 29, 2011
16 September 2011
November 10, 2011
Remark
Preliminary
Final
March 29, 2012
(March, 2012, Version 1.4)
AMIC Technology Corp.

1 page

A25LQ32A pdf, schematic
A25LQ32A Series
32Mbit, 3V Suspend/Resume, Dual/Quad-I/O Serial Flash Memory
with 100MHz Uniform 4KB Sectors
FEATURES
„ Family of Serial Flash Memories
- A25LQ32A: 32M-bit /4M-byte
„ Flexible Sector Architecture with 4KB sectors
- Sector Erase (4K-bytes) in 80ms (typical)
- Block Erase (64K-bytes) in 0.5s (typical)
- Program/Erase Suspend & Resume
„ Page Program (up to 256 Bytes) in 1.5ms (typical)
„ 2.7 to 3.6V Single Supply Voltage
„ Dual input / output instructions resulting in an equivalent
clock frequency of 200MHz:
- FAST_READ_DUAL_OUTPUT Instruction
- FAST_READ_DUAL_INPUT_OUTPUT Instruction
- Dual Input Fast Program (DIFP) Instruction
„ Quad input / output instructions resulting in an equivalent
clock frequency of 400MHz:
- FAST_READ_QUAD_ OUTPUT Instruction
- FAST_READ_QUAD_INPUT_OUTPUT Instruction
- Quad Input Fast Program (QIFP) Instruction
„ SPI Bus Compatible Serial Interface
„ 100MHz Clock Rate (maximum)
„ Deep Power-down Mode 15µA (Max.)
„ Advanced Protection Features
- Software and Hardware Write-Protect
- Top/Bottom, 4KB Complement Array Protection
„ Additional 64-byte user-lockable, one-time programmable
(OTP) area
„ 32Mbit Flash memory
- Uniform 4-Kbyte Sectors
- Uniform 64-Kbyte Blocks
„ Electronic Signatures
- JEDEC Standard Two-Byte Signature
A25LQ32A: (4016h)
- RES Instruction, One-Byte, Signature, for backward
compatibility
A25LQ32A: (15h)
„ Package options
- 8-pin DIP (300mil), 8-pin SOP (209mil) and 8-pin WSON
(6*5mm)
- All Pb-free (Lead-free) products are RoHS compliant
GENERAL DESCRIPTION
The A25LQ32A is 32M bit Serial Flash Memory, with advanced
write protection mechanisms, accessed by a high speed
SPI-compatible bus.
The memory can be programmed 1 to 256 bytes at a time,
using the Page Program instruction.
The memory is organized as 64 blocks, each containing 16
sectors. Each sector is composed of 16 pages. Each page is
256 bytes wide. Thus, the whole memory can be viewed as
consisting of 16,384 pages, or 4,194,304 bytes.
The whole memory can be erased using the Chip Erase
instruction, a block at a time, using Block Erase instruction, or a
sector at a time, using the Sector Erase instruction.
Pin Configurations
„ DIP8 Connections
„ SOP8 Connections
„ WSON8 Connections
A25LQ32A
S
DO (IO1)
W (IO2)
VSS
1
2
3
4
8 VCC
7 HOLD (IO3)
6C
5 DI (IO0)
A25LQ32A
S
DO (IO1)
W (IO2)
VSS
1
2
3
4
8 VCC
7 HOLD (IO3)
6C
5 DI (IO0)
A25LQ32A
S
DO (IO1)
W (IO2)
VSS
1
2
3
4
8 VCC
7 HOLD (IO3)
6C
5 DI (IO0)
(March, 2012, Version 1.4)
1 AMIC Technology Corp.

2 Page

A25LQ32A equivalent
SPI MODES
These devices can be driven by a microcontroller with its SPI
peripheral running in either of the two following modes:
– CPOL=0, CPHA=0
– CPOL=1, CPHA=1
For these two modes, input data is latched in on the rising
edge of Serial Clock (C), and output data is available from the
A25LQ32A Series
falling edge of Serial Clock (C).
The difference between the two modes, as shown in Figure 1,
is the clock polarity when the bus master is in Stand-by mode
and not transferring data:
– C remains at 0 for (CPOL=0, CPHA=0) Æ Mode 0
– C remains at 1 for (CPOL=1, CPHA=1) Æ Mode 3
Figure 1. SPI Modes Supported
CPOL CPHA
Mode 0 0
0C
Mode 3 1
1C
DIO
DO
MSB
MSB
(March, 2012, Version 1.4)
4 AMIC Technology Corp.

5 Page

A25LQ32A diode, scr
A25LQ32A Series
Table 1-2. Protected Area Sizes (CMP=1)
A25LQ32A
Status Register Content
(32M-Bit) Memory Protection
SEC TB BP2 BP1 BP0
XX
0
0
0
Block(s)
0 - 63
Addresses
000000h – 3FFFFFh
Density(Byte)
4MB
Portion
All
00
0
0
1
0 - 62
000000h – 3EFFFFh
4032KB
Lower 63/64
00
0
1
0
0 – 61
000000h – 3DFFFFh
3968KB
Lower 31/32
00
0
1
1
0 – 59
000000h – 3BFFFFh
3840KB
Lower 15/16
00
1
0
0
0 – 55
000000h – 37FFFFh
3584KB
Lower 7/8
00
1
0
1
0 – 47
000000h – 2FFFFFh
3MB
Lower 3/4
00
1
1
0
0 – 31
000000h – 1FFFFFh
2MB
Lower 1/2
01
0
0
1
1 - 63
010000h – 3FFFFFh
4032KB
Upper 63/64
01
0
1
0
2 - 63
020000h – 3FFFFFh
3968KB
Upper 31/32
01
0
1
1
4 - 63
040000h – 3FFFFFh
3840KB
Upper 15/16
01
1
0
0
8 - 63
080000h – 3FFFFFh
3584KB
Upper 7/8
01
1
0
1
16 - 63
100000h – 3FFFFFh
3MB
Upper 3/4
01
1
1
0
32 - 63
200000h – 3FFFFFh
2MB
Upper 1/2
XX
1
1
1
None
None
None
None
10
0
0
1
0 - 62
000000h – 3FEFFFh
4092KB
Lower 1023/1024
10
0
1
0
0 - 62
000000h – 3FDFFFh
4088KB
Lower 511/512
10
0
1
1
0 - 62
000000h – 3FBFFFh
4080KB
Lower 255/256
10
1
0
X
0 - 62
000000h – 3F7FFFh
4064KB
Lower 127/128
10
1
1
0
0 - 62
000000h – 3EFFFFh
4032KB
Lower 63/64
11
0
0
1
1 – 63
001000h – 3FFFFFh
4092KB
Upper 1023/1024
11
0
1
0
1 – 63
002000h – 3FFFFFh
4088KB
Upper 511/512
11
0
1
1
1 – 63
004000h – 3FFFFFh
4080KB
Upper 255/256
11
1
0
X
1 – 63
008000h – 3FFFFFh
4064KB
Upper 127/128
11
1
1
0
1 - 63
010000h – 3FFFFFh
4032KB
Upper 63/64
Note:
1. X = don’t care
2. When CMP is 1, the device is ready to accept a Chip Erase instruction if, and only if, all Block Protect (BP2, BP1, BP0) bits
are 1.
(March, 2012, Version 1.4)
8 AMIC Technology Corp.

9 Page

A25LQ32A transistor, igbt
A25LQ32A Series
Read Data Bytes at Higher Speed by Dual Output (FAST_READ_DUAL_OUTPUT)
The FAST_READ_DUAL_OUTPUT (3Bh) instruction is
similar to the FAST_READ (0Bh) instruction except the data
is output on two pins, IO0 and IO1, instead of just DO. This
allows data to be transferred from the A25LQ32A at twice the
rate of standard SPI devices.
Similar to the FAST_READ instruction, the
FAST_READ_DUAL_OUTPUT instruction can operate at the
highest possible frequency of fC (See AC Characteristics).
This is accomplished by adding eight “dummy” clocks after
the 24-bit address as shown in figure 9. The dummy clocks
allow the device’s internal circuits additional time for setting
up the initial address. The input data during the dummy
clocks is “don’t care”. However, the IO0 and IO1 pins should
be high-impedance prior to the falling edge of the first data
out clock.
Figure 9. FAST_READ_DUAL_OUTPUT Instruction Sequence and Data-Out Sequence
S
0 1 2 3 4 5 6 7 8 9 10 28 29 30 31
C
Instruction (3Bh)
24-Bit Address
IO0 23 22 21 3 2 1 0
MSB
High Impedance
IO1
S
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
C
Dummy Byte
DIO switches from input to output
IO0 7 6 5 4 3 2 1 0 6 4 2 0 6 4 2 0 6 4 2 0 6 4 2 0
IO1 7 5 3 1 7 5 3 1 7 5 3 1 7 5 3 1 7
MSB
MSB
MSB
Data Out 1
Data Out 2
Data Out 3
Data Out 4
Note: Address bits A23 to A22 are Don’t Care, for A25LQ32A.
(March, 2012, Version 1.4)
20 AMIC Technology Corp.

21 Page





Information Total 30 Pages
Download[ A25LQ32A.PDF Datasheet ]

Share Link :

Electronic Components Distributor

SparkFun Electronics Allied Electronics DigiKey Electronics Arrow Electronics
Mouser Electronics Adafruit Element14 Chip One Stop



Featured Datasheets

Part NumberDescriptionManufacturers
A25LQ32AThe function of this parts is a Dual/Quad-I/O Serial Flash Memory.AMIC
AMIC

Quick jump to:

A25L  1N4  2N2  2SA  2SC  74H  ADC  BC  BF  BU  CXA  HCF  IRF  KA  KIA  LA  LM  MC  NE  ST  STK  TDA  TL  UA 


DataSheet39.com is an Online Datasheet PDF Search Site.
It offers a large amount of data sheet, You can free PDF files download.
The updated every day, always provide the best quality and speed.



Index : 0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F  G  H  I  J  K  L  M  N  O  P  Q  R  S  T  U  V  W  X  Y  Z  SCR

www.DataSheet39.com    |   2018   |  Contact Us   |  New  |  Search