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What is P1P40167?

This electronic component, produced by the manufacturer "ON Semiconductor", performs the same function as "4-PLL Low Power Clock Generator".


P1P40167 Datasheet PDF - ON Semiconductor

Part Number P1P40167
Description 4-PLL Low Power Clock Generator
Manufacturers ON Semiconductor 
Logo ON Semiconductor Logo 


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P1P40167
1.8V, 4-PLL Low Power
Clock Generator with
Spread Spectrum
Functional Description
The P1P40167 is a high precision frequency synthesizer designed to
operate with a 27 MHz fundamental mode crystal. Device has 4 PLL’s
with four LVCMOS outputs and a reference clock. The frequencies
generated are 22.5792 MHz, 24.576 MHz, 48 MHz and 37 MHz as
well as a 27 MHz copy of the reference clock. Device offers flexible
spread spectrum options configurable through I2C bus. All output
clocks are generated with high precision, zero PPM frequency
conversion, thus making it suitable for highend multimedia and
consumer applications. I2C is included to support various system
configuration options.
Features
Low Power Architecture to Support Portable Applications
Integrated Loop Filter
Input: 27 MHz Crystal or External Input
Outputs:
27 MHz Reference Output
Fixed Output Frequencies of 48 MHz and 22.5792 MHz
Configurable Spread Spectrum for 37 MHz Output
Selectable Audio Clock Frequency of Either 22.5792 MHz or
24.576 MHz
LVCMOS Input and Outputs
Supply Voltage: 1.8 V
16pin QFN Package
Operating Temperature Range: 10°C to +80°C
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
Applications
Portable Gaming
Audio/Video Multimedia
27 MHz clock or
Crystal Input
SCLK
SDATA
VDD
3
VDDO
2
Crystal
Oscillator
I2C
Control
Logic
PLL1
(SSC)
PLL2
27M
37M
48M
http://onsemi.com
MARKING
DIAGRAM
QFN16
CASE 485G
P1P
40167
ALYWG
G
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = PbFree Package
(*Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
PLL3
22/24M
PLL4
2
VSS
Figure 1. Block Diagram
22M
© Semiconductor Components Industries, LLC, 2012
August, 2012 Rev. 1
1
Publication Order Number:
P1P40167/D

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P1P40167 equivalent
P1P40167
SERIAL DATA INTERFACE
Data Protocol
The Clock Driver serial protocol accepts byte write, byte
read, block write, and block read operations from the
Controller. For Block write/read operation, the bytes must
be accessed in sequential order from lowest to highest byte
(most significant bit first) with the ability to stop after any
complete byte has been transferred. For byte write and byte
read operations, the system controller can access
individually indexed bytes. The offset of the indexed byte is
encoded in the command code as described in the following
table.
Bit
7
(6:0)
Description
0= Block read or Block write operation, 1= Byte read or byte write operation
Byte offset for byte read or byte write operation. For Block read or Block write operations, these bits should be ‘0000000’.
The Block write and Block read protocol is outlined in the table below, followed by the corresponding byte write and byte
read protocol. The slave receiver address is 11010010 (D2h).
Bit
1
2:8
9
10
11:18
19
20:27
28
29:36
37
38:45
46
...
...
...
...
...
...
Block Write Protocol
Description
Start
Slave address – 7 bits
Write = 0
Acknowledge from slave
Command code – 8 bit
‘00000000’ stands for block operation
Acknowledge from slave
Byte count – 8 bits
Acknowledge from slave
Data byte 0 – 8 bits
Acknowledge from slave
Data byte 1 – 8 bits
Acknowledge from slave
………………
Data byte (N1) – 8 bits
Acknowledge from slave
Data byte N – 8 bits
Acknowledge from slave
Stop
Bit
1
2:8
9
10
11:18
19
20
21:27
28
29
30:37
38
39:46
47
48:55
56
..
..
.
Block Read Protocol
Description
Start
Slave address – 7 bits
Write = 0
Acknowledge from slave
Command code – 8 bit
‘00000000’ stands for block operation
Acknowledge from slave
Repeat start
Slave address – 7 bits
Read = 1
Acknowledge from slave
Byte count from slave – 8 bits
Acknowledge from master
Data byte from slave – 8 bits
Acknowledge from master
Data byte from slave – 8 bits
Acknowledge from master
Data byte N from slave – 8 bits
Not Acknowledge from master
Stop
http://onsemi.com
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Featured Datasheets

Part NumberDescriptionMFRS
P1P40167The function is 4-PLL Low Power Clock Generator. ON SemiconductorON Semiconductor

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