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PDF MT9V124 Data sheet ( Hoja de datos )

Número de pieza MT9V124
Descripción 1/13-Inch System-On-A-Chip (SOC) CMOS Digital Image Sensor
Fabricantes ON Semiconductor 
Logotipo ON Semiconductor Logotipo



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MT9V124: 1/13-Inch VGA SOC Digital Image Sensor
Features
1/13-Inch System-On-A-Chip (SOC) CMOS Digital
Image Sensor
MT9V124 Datasheet, Rev. C
For the latest datasheet, please visit www.onsemi.com
Features
• Superior low-light performance
• Ultra-low-power
• VGA video at 30fps
• Internal master clock generated by on-chip phase
locked loop (PLL) oscillator
• Electronic rolling shutter (ERS), progressive scan
• Integrated image flow processor (IFP) for single-die
camera module
• One-time programmable memory (OTPM)
• Automatic image correction and enhancement,
including four-channel lens shading correction
• Image scaling with anti-aliasing
• Supports ITU-R BT.656 format with Odd Timing
code
• Two-wire serial interface providing access to
registers and microcontroller memory
• Selectable output data format: YCbCr, 565RGB, and
RAW8+2-bit, BT656
• High Speed serial data output in 12-bit packet
• Independently configurable gamma correction
• Direct XDMA access (reducing serial commands)
• Integrated hue rotation ±22°
Applications
• Medical tools, device
• Biometrics
• Industrial application
General Description
ON Semiconductor's MT9V124 is a 1/13-inch CMOS
digital image sensor with an active-pixel array of 648H
x 488V. It includes sophisticated camera functions
such as auto exposure control, auto white balance,
black level control, flicker detection and avoidance,
and defect correction. It is designed for low light per-
formance. It is programmable through a simple two-
wire serial interface. The MT9V124 produces extraordi-
narily clear, sharp digital pictures that make it the per-
fect choice for a wide range of medical and industrial
applications.
Table 1:
Key Parameters
Parameter
Typical Value
Optical format
1/13-inch
Active pixels
648 x 488 = 0.3 Mp (VGA)
Pixel size
1.75m
Color filter array
RGB Bayer
Shutter type
Electronic rolling shutter (ERS)
Input clock range
18 – 44 MHz
Output LVDS
12-bit packet
Frame rate, full
resolution
30 fps
Responsivity
1.65 V/lux*sec
SNRMAX
Dynamic range
33.4 dB
58 dB
Supply
voltage
Analog
Digital
Digital I/O
2.5–3.1V
1.7–1.95V
1.7–1.95V or 2.5–3.1V
Power consumption 55 mW
Operating temperature
(ambient) -TA
–30 °C to +70 °C
Chief ray angle
24°
Package options
Bare die, CSP
MT9V124_DS Rev.C Pub. 5/15 EN
1 ©Semiconductor Components Industries, LLC 2015,

1 page




MT9V124 pdf
MT9V124: 1/13-Inch VGA SOC Digital Image Sensor
List of Tables
List of Tables
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Table 20:
Key Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Available Part Numbers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Status of Output Signals During Reset and Standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
YCbCr Output Data Ordering. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
RGB Ordering in Default Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
2-Byte Bayer Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
Summary of MT9V124 Variables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
LVDS Packet Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
LVDS Serial Output Data Timing (for EXTCLK = 22MHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
EXTCLK Input Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
Operating/Standby Current Consumption. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
LVDS Output Port DC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
LVDS Output Port DC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
Two-Wire Serial Interface Timing Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
Power Up Signal Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40
Package Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
MT9V124_DS Rev.C Pub. 5/15 EN
5 ©Semiconductor Components Industries, LLC, 2015.

5 Page





MT9V124 arduino
MT9V124: 1/13-Inch VGA SOC Digital Image Sensor
Functional Description
Image Data Output Interface
The High Speed LVDS output port on MT9V124 can transmit the sensor image data to
the host system over a lengthy differential twisted pair cable.
The MT9V124 provides a serial high-speed output port, which is able for driving stan-
dard IEEE 1596.3-1996 LVDS receiver/deserializers such as the DS92LV1212A LVDS
Deserializer by National Semiconductor.
Image data is provided to the host system by the serial LVDS interface. The Start bit, 8-bit
image data, LV, FV, and Stop bit are packetized in a 12-bit packet. The output interface
block can select either raw data or processed data. Processed data format includes
YCbCr, RGB-565, and BT656 with odd SAV/EAV code. It also supports the SOC Bypass
8+2 data format over the 12-bit packet.
The LVDS port is disabled when Hard Standby or Soft Standby is asserted.
MT9V124_DS Rev.C Pub. 5/15 EN
11
©Semiconductor Components Industries, LLC, 2015.

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