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PDF SiHD5N50D Data sheet ( Hoja de datos )

Número de pieza SiHD5N50D
Descripción D Series Power MOSFET
Fabricantes Vishay 
Logotipo Vishay Logotipo



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SiHD5N50D
Vishay Siliconix
D Series Power MOSFET
PRODUCT SUMMARY
VDS (V) at TJ max.
RDS(on) max. at 25 °C ()
Qg (max.) (nC)
Qgs (nC)
Qgd (nC)
Configuration
550
VGS = 10 V
20
3
5
Single
1.5
DPAK
(TO-252)
D
D
G
GS
S
N-Channel MOSFET
FEATURES
• Optimal Design
- Low Area Specific On-Resistance
- Low Input Capacitance (Ciss)
- Reduced Capacitive Switching Losses
- High Body Diode Ruggedness
- Avalanche Energy Rated (UIS)
Available
• Optimal Efficiency and Operation
- Low Cost
- Simple Gate Drive Circuitry
- Low Figure-of-Merit (FOM): Ron x Qg
- Fast Switching
• Material categorization: For definitions of compliance
please see www.vishay.com/doc?99912
APPLICATIONS
• Consumer Electronics
- Displays (LCD or Plasma TV)
• Server and Telecom Power Supplies
- SMPS
• Industrial
- Welding
- Induction Heating
- Motor Drives
• Battery Chargers
ORDERING INFORMATION
Package
Lead (Pb)-free
Lead (Pb)-free and Halogen-free
DPAK (TO-252)
SiHD5N50D-E3
SiHD5N50D-GE3
SiHD5N50DT1-GE3
SiHD5N50DT4-GE3
SiHD5N50DT5-GE3
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
Drain-Source Voltage
Gate-Source Voltage
Gate-Source Voltage AC (f > 1 Hz)
VDS
VGS
Continuous Drain Current (TJ = 150 °C)
Pulsed Drain Currenta
VGS at 10 V
TC = 25 °C
TC = 100 °C
Linear Derating Factor
Single Pulse Avalanche Energyb
Maximum Power Dissipation
Operating Junction and Storage Temperature Range
Drain-Source Voltage Slope
Reverse Diode dV/dt (d)
TJ = 125 °C
Soldering Recommendations (Peak Temperature)c
for 10 s
ID
IDM
EAS
PD
TJ, Tstg
dV/dt
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature.
b. VDD = 50 V, starting TJ = 25 °C, L = 2.3 mH, Rg = 25 , IAS = 4.5 A.
c. 1.6 mm from case.
d. ISD ID, starting TJ = 25 °C.
LIMIT
500
± 30
30
5.3
3.4
10
0.83
23
104
- 55 to + 150
24
0.28
300
UNIT
V
A
W/°C
mJ
W
°C
V/ns
°C
S13-1489-Rev. B, 01-Jul-13
1
Document Number: 91499
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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SiHD5N50D pdf
www.vishay.com
VDS
VGS
RG
RD
D.U.T.
10 V
Pulse width 1 µs
Duty factor 0.1 %
+- VDD
Fig. 12 - Switching Time Test Circuit
VDS
90 %
10 %
VGS
td(on) tr
td(off) tf
Fig. 13 - Switching Time Waveforms
VDS
Vary tp to obtain
required IAS
RG
10 V
tp
L
D.U.T
IAS
0.01 Ω
+
- VDD
Fig. 14 - Unclamped Inductive Test Circuit
VDS
VDS
tp
VDD
IAS
Fig. 15 - Unclamped Inductive Waveforms
SiHD5N50D
Vishay Siliconix
10 V
QGS
VG
QG
QGD
Charge
Fig. 16 - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
12 V
50 kΩ
0.2 µF
0.3 µF
+
D.U.T. - VDS
VGS
3 mA
IG ID
Current sampling resistors
Fig. 17 - Gate Charge Test Circuit
S13-1489-Rev. B, 01-Jul-13
5
Document Number: 91499
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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