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PDF PL520-20 Data sheet ( Hoja de datos )
| Número de pieza | PL520-20 | |
| Descripción | Low Phase Noise VCXO | |
| Fabricantes | Micrel | |
| Logotipo |  |
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PL520-20
Low Phase Noise VCXO (for 100-200MHz Fundamental Crystals)
FE AT UR E S
100MHz to 200MHz Fundamental Mode Crystals
Output range (no PLL):
100MHz – 200MHz (3.3V).
100MHz – 170MHz (2.5V).
Low Injection Power for crystal 50uW.
Complementary outputs: CMOS, PECL or LVDS.
Selectable OE Logic (enable high or enable low).
Integrated variable capacitors.
Supports 2.5V or 3.3V-Power Supply.
Available in die form.
Die thickness is 10 mil.
DESCRIPTION
PL520-20 is a VCXO IC specifically designed to pull
high frequency fundamental crystals. Its design was
optimized to tolerate higher limits of inter-electrode
capacitance and bonding capacitance to improve
yield. It achieves very low current into the crystal
resulting in better overall stability. Its internal
varicaps allow on-chip frequency pulling, controlled
by the VCON input.
BLOCK DIAGRAM
VCON Oscillator
Amplifier
X+
w/
integrated
varicaps
X-
OE
Q
Q
PL520-20
DIE CONFIGURATION
65 mil
25 24 23 22 21 20 19 18
XIN 26
XOUT 27
Die ID:
A1919-19B
DNC 28
DNC 29
OE 30
VCON 31
C502A
12345 6 78
(1550,1475)
17 GNDBUF
16 CMOS
15 LVDSB
14 PECLB
13 VDDBUF
12 VDDBUF
11 PECL
10 LVDS
9 OE_SELECT
Y (0,0)
X
DIE SPECIFICATIONS
Name
Size
Reverse side
Pad dimensions
Thickness
Value
62 x 65 mil
GND
80 micron x 80 micron
10 mil
OUTPUT SELECTION AND ENABLE
Pad #18
OUTSEL1
0
0
1
1
Pad #25
OUTSEL0
0
1
0
1
Selected Output
High Drive CMOS
Standard CMOS
L VD S
PECL (default)
OE_SELECT
(Pad #9)
OE
(Pad #30)
State
0
0 Tri-state
1 (Default) Output enabled
1 (Default)
0 (Default) Output enabled
1 Tri-state
Pad #9, 18, 25 : Bond to GND to se t to “0 ”, bond to VD D to se t to “1 ”
No connec tion resul ts to “de fau l t” se tting through in ternal pu ll -up/-do wn.
Pad #30: Logical s ta tes de fined by PECL leve ls i f O E_SELECT (pad #9) is “1 ”
Logical s ta tes de fined by CM OS levels i f O E_SELECT is “0 ”
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 3/13/07 Page 1
1 page  
PL520-20
Low Phase Noise VCXO (for 100-200MHz Fundamental Crystals)
8. LVDS Electrical Characteristics
PARAMETERS
SYMBOL CONDITIONS
Output Differential Voltage
VDD Magnitude Change
Output High Voltage
Output Low Voltage
Offset Voltage
Offset Magnitude Change
Power-off Leakage
Output Short Circuit Current
VOD
VOD
VOH
VOL
VOS
VOS
IOXD
IOSD
RL = 100
(see figure)
Vout = VDD or GND
VDD = 0V
9. LVDS Switching Characteristics
PARAMETERS
Differential Clock Rise Time
Differential Clock Fall Time
SYMBOL
tr
tf
CONDITIONS
RL = 100
CL = 10 pF
(see figure)
MIN.
247
-50
0.9
1.125
0
MIN.
0.2
0.2
TYP. MAX.
355 454
50
1.4 1.6
1.1
1.2 1.375
3 25
1 10
-5.7 -8
TYP.
0.7
0.7
MAX.
1.0
1.0
UNITS
mV
mV
V
V
V
mV
uA
mA
UNITS
ns
ns
LVDS Levels Test Circuit
OUT
OUT
VO D
50
VO S
50
LVDS Switching Test Circuit
OUT
CL = 10pF
VDIF F
OUT
CL = 10pF
RL = 100
LVDS Transistion Time Waveform
OUT
OUT
0V (Differential)
VDIF F
0V
20%
80%
80%
20%
tR tF
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 3/13/07 Page 5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet PL520-20.PDF ] | |
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