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PDF HX8802B Data sheet ( Hoja de datos )

Número de pieza HX8802B
Descripción TFT-LCD TCON
Fabricantes Himax 
Logotipo Himax Logotipo



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HX8802A/HX8802B Data Sheet
TFT-LCD TCON with DAC
Version 06
March, 2004
Himax Technologies, Inc.
1F, No.12, Nanke 8th Road,
Tainan Science-Based Industrial Park,
Tainan County, Taiwan 741, R.O.C.
TEL: 886-6-505-0880
FAX: 886-6-505-0891
DOC No:HX8802-DS

1 page




HX8802B pdf
HX8802A/HX8802B
TFT-LCD TCON with DAC
5. Pin Description
Pin no. Pin no.
64 pin 48 pin
Symbol
I/O
Description
1
2
IDCLK
I Input data sampling clock at rising edge
Start pulse for source driver.
2
3
STHR
O (1) STHR is ”HiZ”, when LRC=”H”
(2) STHR is ”Output”, when LRC=”L”
Start pulse for source driver.
3
4
STHL
O (1) STHL is ”HiZ”, when LRC=”L”
(2) STHL is ”Output”, when LRC=”H”
Start pulse for gate driver.
4
5
STVU
O (1) STVU is “HiZ”, when UDC=”H”
(2) STVU is ”Output”, when UDC=”L”
Start pulse for gate driver.
5
6
STVD
O (1) STVD is ”HiZ”, when UDC=”L”
(2) STVD is ”Output”, when UDC=”H”
6
7
OEV
O Gate driver output enable control
7
8
CKV
O Shift clock for gate driver
8
9
OEH
O Source driver output enable control
9 10 VDD
Digital supply voltage
Panel group setting
(1) For panel group I, when PNCS=”L”(refer to
10
PNCS(1)
I
HX8802A for this setting)
(2) For panel group II, when PNCS=”H”(refer to
HX8802B for this setting)
11 11 VSSD
Digital supply ground
Gamma correction enable control(default pull-up)
12 12 GAM_EN I (1)Gamma correction enable, when GAM_EN=”H”
(2)Gamma correction disable, when GAM_EN=”L”
13 13
IHS I Horizontal sync input with negative polarity
14 14
IVS I Vertical sync input with negative polarity
15 15
Q1H
O
R, G, B video signals sample & hold multiplexer
control signal for source driver
16
16
VCOM
O
Toggling signal for common electrode generation
circuits
17 N.C. (2)
18 N.C. (2)
19
PWS3
O Pulse width signal III
20 N.C. (2)
21 17 PALSDS(3) I PAL scale down algorithm setting pin I
22 N.C. (2)
23
PWS2
O Pulse width signal II
24
PWS1
O Pulse width signal I
25 N.C. (2)
26 N.C. (2)
Version 06
Himax
Technologies, Inc.
4

5 Page





HX8802B arduino
HX8802A/HX8802B
TFT-LCD TCON with DAC
b. Input data enable control
b-1. IDEN enable mode
The interval between IDEN rising edge and STHL(R) rising edge is fixed at 3-
IDCLK, therefore the display position is fixed.
PARAMETER
Symbol Min.
Typ. Max. Unit.
IDEN pulse width
IHS-IDEN time
tEP - 288 - tC
tHE 36 - 72 tC
b-2. IDEN disable mode (IDEN = “L”)
The display starts from 61th clk from the IHS falling edge.
c. Vertical display position
PARAMETER
Symbol
Vertical display position
tVS
Min.
-
Typ.
25
34
Max.
-
Unit.
tH
tH
d. Output signal characteristics
PARAMETER
Rising time(1)
Falling time(1)
Clock high and low level
pulse width(2)
Symbol
tr
tf
tCPH
Clock pulse duty
tCWH
3-φ clock phase difference
tC12, tC23,
tC31
STH setup time
tSUH
STH pulse width
tSTH
OEH pulse width
tOEH
Sample & hold disable
time
tDIS1
OEV pulse width
CKV pulse width
IHS-OEH time
IHS -CKV time
IHS -OEV time
STV setup time
STV pulse width
IVS-STVD
time(UDC=’L’)
IVS-STVU
time(UDC=’H’)
OEH-STV time
NTSC
PAL
NTSC
PAL
tOEV
tCKV
t1
t2
t3
tSUV
tSTV
tVS1
tVS1
tVS2
tVS2
tOES
Note: (1) For all of the logic signals.
(2) CPH1~3.
Min.
-
-
-
40
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Typ.
-
-
3
50
tCPH/3
tCPH/2
1
3
9
5
5
8
6
2
3
1
16
25
16
25
2
Max.
10
10
-
60
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Unit.
ns
ns
tC
%
ns
tCPH
tCPH
tCPH
tCPH
tCPH
tCPH
tCPH
tCPH
tCPH
tCPH
tH
tH
tH
tH
tH
tH
Version 06
Himax
Technologies, Inc.
10

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