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PDF RTL8305S Data sheet ( Hoja de datos )
| Número de pieza | RTL8305S | |
| Descripción | 5-PORT 10/100 MBPS SINGLE CHIP SWITCH CONTROLLER | |
| Fabricantes | Realtek | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de RTL8305S (archivo pdf) en la parte inferior de esta página. Total 24 Páginas | ||
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RTL8305S
RTL8305S
5-PORT 10/100 MBPS SINGLE CHIP
SWITCH CONTROLLER
1. Features ..................................................................................................................................................................................... 2
2. General Description .................................................................................................................................................................. 2
3. Block Diagram .......................................................................................................................................................................... 3
4. Pin Assignments........................................................................................................................................................................ 4
5. Pin Descriptions ........................................................................................................................................................................ 6
5.1 Media Connection Pins ....................................................................................................................................................... 6
5.2 Mode Pins ........................................................................................................................................................................... 6
5.3 Port4 Related Pins............................................................................................................................................................... 7
5.4 LED Pins............................................................................................................................................................................. 8
5.5 Power Pins .......................................................................................................................................................................... 8
5.6 Miscellaneous Pins.............................................................................................................................................................. 8
5.7 Reserved Pins...................................................................................................................................................................... 8
6. Functional Description.............................................................................................................................................................. 9
6.1 Introduction......................................................................................................................................................................... 9
6.2 Switch Core Functional Overview ...................................................................................................................................... 9
6.2.1 Address Search, Learning and Aging........................................................................................................................... 9
6.2.2 Buffer Management.................................................................................................................................................... 10
6.2.3 Data Reception ........................................................................................................................................................... 10
6.2.4 Data Forwarding......................................................................................................................................................... 10
6.2.5 Flow Control ...............................................................................................................................................................11
6.2.6 Back-off Algorithm .....................................................................................................................................................11
6.2.7 Inter-Frame Gap ..........................................................................................................................................................11
6.2.8 Illegal Frame ...............................................................................................................................................................11
6.2.9 Broadcast Storm Control.............................................................................................................................................11
6.3 Physical Layer Functional Overview .................................................................................................................................11
6.3.1 Auto-negotiation .........................................................................................................................................................11
6.3.2 10Base-T Transmit Function.......................................................................................................................................11
6.3.3 10Base-T Receive Function ........................................................................................................................................11
6.3.4 Link Monitor ...............................................................................................................................................................11
6.3.5 100Base-TX Transmit Function ................................................................................................................................. 12
6.3.6 100Base-TX Receive Function .................................................................................................................................. 12
6.3.7 Power Saving Mode ................................................................................................................................................... 12
6.4 LED................................................................................................................................................................................... 12
6.5 MII Port............................................................................................................................................................................. 13
6.5.1 General Description ................................................................................................................................................... 13
6.5.2 MII/SNI PHY Mode................................................................................................................................................... 16
6.5.3 MII MAC Mode ......................................................................................................................................................... 16
7. Electrical Characteristics......................................................................................................................................................... 18
7.1 Absolute Maximum Ratings ............................................................................................................................................. 18
7.2 Operating Range ............................................................................................................................................................... 18
7.3 DC Characteristics (0°C<Ta<60°C, 3.15V<Vcc<3.45V) ................................................................................................. 18
7.4 AC Characteristics (0°C<Ta<60°C, 3.15V<Vcc<3.45V) ................................................................................................. 19
7.5 Digital Timing Characteristics .......................................................................................................................................... 20
7.6 Thermal Data..................................................................................................................................................................... 20
8. Application Information.......................................................................................................................................................... 21
9. System Application Diagram .................................................................................................................................................. 22
10. Mechanical Dimensions ........................................................................................................................................................ 23
2002/02/19
1
Rev. 1.2
1 page  
' I ' stands for inputs; 'O' stands for outputs; 'A' stands for analog; 'D' stands for digital
Name
RGND
TGND
TXOP[0]
TXON[0]
TVDD
TVDD
TXON[1]
TXOP[1]
TGND
RGND
RXIP[1]
RXIN[1]
RVDD
RVDD
RXIN[2]
RXIP[2]
RGND
TGND
TXOP[2]
TXON[2]
TVDD
TVDD
TXON[3]
TXOP[3]
TGND
RGND
RXIP[3]
RXIN[3]
RVDD
RVDD
RXIN[4]
RXIP[4]
RGND
TGND
TXOP[4]
TXON[4]
TVDD
MVDD
GND
RESET#
TESTCLK
TESTDATA
VDD
X1
X2
P4FLCTRL#
P4SPDSTA#
P4DUPSTA#
P4LNKSTA#
GND
MTXC/MRXC
MTXEN/MRXDV
VDD
MTXD[0]/MRXD[0]
MTXD[1]/MRXD[1]
MTXD[2]/MRXD[2]
MTXD[3]/MRXD[3]
MCOL
MRXC/MTXC
MRXDV/MTXEN
MRXD[0]/MTXD[0]
VDD
MRXD[1]/MTXD[1]
MGND
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61,
62
63
64
Type
AGND
AGND
AO
AO
AVDD
AVDD
AO
AO
AGND
AGND
AI
AI
AVDD
AVDD
AI
AI
AGND
AGND
AO
AO
AVDD
AVDD
AO
AO
AGND
AGND
AI
AI
AVDD
AVDD
AI
AI
AGND
AGND
AO
AO
AVDD
DVDD
DGND
I
I
I/O
DVDD
I
O
I
I
I
I
DGND
I/O
O
DVDD
O
O
O
O
I/O
I/O
I
I
DVDD
I
DGND
Name
GND
MRXD[2]/MTXD[2]
MRXD[3]/MTXD[3]
SEL_MIIMAC#
RESERVED
VDD
CK25MOUT
NC
NC
NC
NC
NWAYHALF#
ENFCTRL
ENBKPRS
GND
ENBRDCTRL
NC
NC
NC
NC
NC
NC
VDD
NC
LED_BLNK_TIME
DIS_RST_BLNK#
ENP4LED
NC,
NC
GND
NC
NC
P4MODE[1]
P4MODE[0]
NC
VDD
NC
GND
LED_DUP[0]
LED_ACT[0]
LED_SPD[0]
VDD
LED_DUP[1]
LED_ACT[1]
LED_SPD[1]
LED_DUP[2]
LED_ACT[2]
GND
LED_SPD[2]
VDD
LED_DUP[3]
LED_ACT[3]
LED_SPD[3]
LED_DUP[4]
LED_ACT[4]
LED_SPD[4]
TEST#
GND
AGND
IBREF
AVDD
RVDD
RXIN[0]
RXIP[0]
Pin No.
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
RTL8305S
Type
DGND
I
I
O
I
DVDD
O
I
I
I
DGND
I
DVDD
I
I
I
DGND
I
I
DVDD
DGND
O
O
O
DVDD
O
O
O
O
O
GND
O
DVDD
O
O
O
O
O
O
O
DGND
AGND
A
AVDD
AVDD
AI
AI
2002/02/19
5
Rev. 1.2
5 Page 
RTL8305S
6.2.5 Flow Control
The RTL8305S supports IEEE 802.3x full duplex flow control and half duplex back-pressure congestion control. Once
the full duplex flow control ability is enabled via ENFCTRL, the Nway ability with full duplex flow control will be
negotiated during the auto-negotiation process. When operating in half duplex mode, a proprietary back-pressure
algorithm is enabled via the ENBKPRS pin, which can prevent traditional hub devices from partition due to excessive
collisions. For MII port applications, the same functions will be applied to port4 depending on the state of P4FLCTRL#
and P4DUPSTA#. If port4 is not configured to MII port application, it acts as a UTP port and behaves according to the
configuration of the ENFCTRL and ENBKPRS pins.
6.2.6 Back-off Algorithm
The RTL8305S implements the truncated exponential back-off algorithm compliant to the 802.3 standard. The collision
counter will be reset after 16 consecutive collisions, which leads to a smaller back-off time.
6.2.7 Inter-Frame Gap
The Inter-Frame Gap is 9.6us for 10Mbps Ethernet and 960ns for 100Mbps Fast Ethernet.
6.2.8 Illegal Frame
Illegal frames such as CRC error packets, runt packets ( packet length less than 64 bytes) and oversize packets (packet length
greater than 1536 bytes) will be discarded.
6.2.9 Broadcast Storm Control
The RTL8305S processes broadcast storm control via the latched value of the EnBrdCtrl pin upon reset. Once enabled, the
incoming consecutive broadcast packets will be discarded after consecutive 64 broadcast packets are received during an 800ms
time window. Any non-broadcast packets can reset the time window and broadcast counter such that the scheme restarts.
6.3 Physical Layer Functional Overview
6.3.1 Auto-negotiation
The RTL8305S obtains the states of duplex, speed and flow control ability through the auto-negotiation mechanism, defined in
IEEE802.3u specifications, for each UTP port. During auto-negotiation, each port advertises its ability to its link partner and
compares ability with those received from its link partner. By default, the RTL8305S advertises full capabilities (100Full,
100Half, 10Full, 10Half) together with flow control ability.
Asserting NWAYHALF# sets the Nway ability of the RTL8305S to half duplex only (100Half, 10Half). Deasserting
ENFCTRL sets the Nway ability without the flow control function. ENBKPRS is a pin to enable the half duplex flow control
scheme, which is defined in auto-negotiation. The MII port obtains its duplex, speed, flow control and link states from pins as
described in section 5.5.
6.3.2 10Base-T Transmit Function
The output 10Base-T waveform is Manchester-encoded and driven into the network medium. The internal filter shapes the
driven signals to reduce EMI emission, eliminating the need for an external filter.
6.3.3 10Base-T Receive Function
The Manchester decoder converts the incoming serial stream to NRZ data when the squelch circuit detects that the signal level
has exceeded the configured squelch level.
6.3.4 Link Monitor
The 10Base-T link pulse detection circuit always monitors the RXIP/RXIN pins for the presence of valid link pulses.
Auto-polarity is implemented to correct the detected reverse polarity of RXIP/RXIN signal pairs.
2002/02/19
11
Rev. 1.2
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet RTL8305S.PDF ] | |
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