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A1318 Datasheet PDF


A1318 - Allegro

Part Number A1318
Description Linear Hall-Effect Sensor ICs
Manufacturers Allegro 
Logo Allegro Logo 
Preview
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A1318 datasheet
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A1318 pdf, equivalent, schematic
A1318 and
A1319
Linear Hall-Effect Sensor ICs with Analog Output
Available in a Miniature, Low Profile Surface Mount Package
Description (continued)
sensitivity drift of the Hall element, a small-signal high-gain amplifier,
a clamped low-impedance output stage, and a proprietary dynamic
offset cancellation technique.
The A1318 and A1319 sensor ICs are offered in two package styles.
The LH is a SOT-23W style, miniature, low profile package for
surface-mount applications. The UA is a 3-pin, ultra-mini, single
inline package (SIP) for through-hole mounting. Both packages are
lead (Pb) free, with 100% matte tin leadframe plating.
Selection Guide
Part Number
Output Sensitivity
Polarity (typ) (mV/G)
A1318LLHLX-1-T
Forward
1.35
A1318LLHLX-2-T
Forward
2.5
A1318LUA-2-T
Forward
2.5
A1319LLHLX-5-T
Forward
5
A1319LUA-5-T
Forward
*Contact Allegrofor additional packing options
5
Packing*
10,000 pieces per reel
10,000 pieces per reel
500 pieces per bag
10,000 pieces per reel
500 pieces per bag
Package
3-pin SOT-23W surface mount
3-pin SOT-23W surface mount
3-pin SIP through hole
3-pin SOT-23W surface mount
3-pin SIP through hole
Absolute Maximum Ratings
Characteristic
Forward Supply Voltage
Reverse Supply Voltage
Forward Output Voltage
Reverse Output Voltage
Output Source Current
Output Sink Current
Operating Ambient Temperature
Maximum Junction Temperature
Storage Temperature
Symbol
VCC
VRCC
VOUT
VROUT
IOUT(SOURCE)
IOUT(SINK)
TA
TJ(max)
Tstg
VOUT to GND
VCC to VOUT
Range L
Notes
Rating
8
–0.1
7
–0.1
2
10
–40 to 150
165
–65 to 170
Unit
V
V
V
V
mA
mA
ºC
ºC
ºC
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
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A1318 transistor, diode fet, igbt, scr
A1318 and
A1319
Linear Hall-Effect Sensor ICs with Analog Output
Available in a Miniature, Low Profile Surface Mount Package
Application Information
3.3 V
A1318
A1319
VCC
VOUT
0.1 µF
GND
RL 4.7 nF
Figure 5. Typical Application Circuit
Chopper Stabilization Technique
When using Hall-effect technology, a limiting factor for
switchpoint accuracy is the small signal voltage developed across
the Hall element. This voltage is disproportionally small relative
to the offset that can be produced at the output of the Hall sensor
IC. This makes it difficult to process the signal while maintain-
ing an accurate, reliable output over the specified operating
temperature and voltage ranges. Chopper stabilization is a unique
approach used to minimize Hall offset on the chip. Allegro
employs a patented technique to remove key sources of the out-
put drift induced by thermal and mechanical stresses. This offset
reduction technique is based on a signal modulation-demodula-
tion process. The undesired offset signal is separated from the
magnetic field-induced signal in the frequency domain, through
modulation. The subsequent demodulation acts as a modulation
process for the offset, causing the magnetic field-induced signal
to recover its original spectrum at base band, while the DC offset
becomes a high-frequency signal. The magnetic-sourced signal
then can pass through a low-pass filter, while the modulated DC
offset is suppressed. In addition to the removal of the thermal and
mechanical stress related offset, this novel technique also reduces
the amount of thermal noise in the Hall sensor IC while com-
pletely removing the modulated residue resulting from the chop-
per operation. The chopper stabilization technique uses a high
frequency sampling clock. For demodulation process, a sample
and hold technique is used. This high-frequency operation allows
a greater sampling rate, which results in higher accuracy and
faster signal-processing capability. This approach desensitizes
the chip to the effects of thermal and mechanical stresses, and
produces devices that have extremely stable quiescent Hall output
voltages and precise recoverability after temperature cycling.
This technique is made possible through the use of a BiCMOS
process, which allows the use of low-offset, low-noise amplifiers
in combination with high-density logic integration and sample-
and-hold circuits.
Regulator
Hall Element
Clock/Logic
Amp
Anti-aliasing Tuned
LP Filter Filter
Figure 6. Chopper Stabilization Technique
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
9





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