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PDF K4017 Data sheet ( Hoja de datos )
| Número de pieza | K4017 | |
| Descripción | MOSFET ( Transistor ) - 2SK4017 | |
| Fabricantes | Toshiba Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de K4017 (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
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2SK4017
www.DataSheet4U.com
TOSHIBA Field Effect Transistor Silicon N-Channel MOS Type (U-MOS III)
2SK4017
Chopper Regulator, DC-DC Converter and Motor Drive
Applications
z 4-V gate drive
z Low drain−source ON-resistance: RDS (ON) = 0.07 Ω (typ.)
z High forward transfer admittance: |Yfs| = 6.0 S (typ.)
z Low leakage current: IDSS = 100 μA (max) (VDS = 60 V)
z Enhancement mode: Vth = 1.3 to 2.5 V (VDS = 10 V, ID = 1 mA)
Absolute Maximum Ratings (Ta = 25°C)
Characteristic
Drain−source voltage
Drain−gate voltage (RGS = 20 kΩ)
Gate−source voltage
Drain current
DC (Note 1)
Pulse (Note 1)
Drain power dissipation (Tc = 25°C)
Single-pulse avalanche energy
(Note 2)
Avalanche current
Repetitive avalanche energy (Note 3)
Channel temperature
Storage temperature range
Symbol
VDSS
VDGR
VGSS
ID
IDP
PD
EAS
IAR
EAR
Tch
Tstg
Rating
60
60
±20
5
20
20
40.5
5
2
150
−55 to 150
Unit
V
V
V
A
A
W
mJ
A
mJ
°C
°C
6.5 ± 0.2
5.2 ± 0.2
Unit: mm
0.6 MAX.
0.9 1.1 ± 0.2
0.6 MAX.
2.3 2.3
123
0.8 MAX.
1.1 MAX.
0.6 ± 0.15
0.6 ± 0.15
1. GATE
2. DRAIN
（HEAT SINK）
3. SOURSE
2
1
3
JEDEC
⎯
JEITA
⎯
TOSHIBA
2-7J2B
Weight: 0.36 g (typ.)
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability
Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e.
reliability test report and estimated failure rate, etc).
Thermal Characteristics
Characteristic
Symbol
Max Unit
Thermal resistance, channel to case
Thermal resistance, channel to ambient
Rth (ch−c)
Rth (ch−a)
6.25 °C / W
125 °C / W
Note 1: Ensure that the channel temperature does not exceed 150°C.
Note 2: VDD = 25 V, Tch = 25°C (initial), L = 2.2 mH, RG = 25 Ω, IAR = 5 A
Note 3: Repetitive rating: pulse width limited by maximum channel temperature
This transistor is an electrostatic-sensitive device. Handle with care.
1 2009-09-29
1 page  
2SK4017
www.DataSheet4U.com
rth − tw
10
1
Duty = 0.5
0.2
0.1
0.1
0.01
0.02
0.05
0.01
10 μ
100 μ
Single Pulse
PDM
t
T
Duty = t/T
Rth (ch-c) = 6.25°C/W
1 m 10 m 100 m
1
10
Pulse width tw (s)
SAFE OPERATING AREA
100
ID max (pulse)*
10 IDmax (continuous) 1 ms *
DC OPERATION
TC =25°C
1
100 μs *
0.1
* Single pulse
Tc = 25°C
Curves must be derated linearly
with increase in temperature.
0.01
0.1
1
VDSS max
10
Drain-source voltage VDS (V)
100
EAS – Tch
50
40
30
20
10
0
25 50 75 100
Channel temperature (initial)
125 150
Tch (°C)
15 V
0V
Test circuit
RG = 25 Ω
VDD = 25 V, L = 2.2 mH
BVDSS
IAR
VDD
VDS
Waveform
ΕAS
=
1
2
⋅
L
⋅I2
⋅
⎜⎜⎝⎛
BVDSS
BVDSS − VDD
⎟⎟⎠⎞
5 2009-09-29
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet K4017.PDF ] | |
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