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PDF MT29F4G01AAADD Data sheet ( Hoja de datos )
| Número de pieza | MT29F4G01AAADD | |
| Descripción | 4Gb x1: SPI NAND Flash Memory | |
| Fabricantes | Micron | |
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Micron Confidential and Proprietary
Advance‡
NAND Flash Memory
Serial Peripheral Interface (SPI)
MT29F4G01AAADD
4Gb x1: SPI NAND Flash Memory
Features
Features
• Single-level cell (SLC) technology
• Organization
– Page size x1: 2112 bytes (2048 + 64 bytes)
– Block size: 64 pages (128K + 4K bytes)
– Plane size: 2 planes x 2048 blocks per plane
– Device size: 4Gb: 4096 blocks
• Data retention: 10 years
• New commands
– PAGE READ in x2 mode
– PAGE READ in x4 mode
Options
• Density: 4Gb (single die)
• Operating temperature
– Commercial (0°C to +70°C)
– Industrial (–40°C to +85°C)
• Package
– 63-ball VFBGA, lead-free, (10.5mm x 13mm)
Table 1: NAND Flash SPI Parameters
Parameters
VCC range
Frequency
Transfer rate
Loading throughput
tBERS (BLOCK ERASE)
tPROG (PAGE PROGRAM)
tRD (PAGE READ)
Internal ECC correction
Width
Value
2.7–3.6V
50 MHz
20ns
50 MT/s
4ms (TYP)
400µs (TYP)
100µs (MAX)
4-bit
x1, x2, x4
PDF: 09005aef839b1d72
4gb_nand_spi_m60a.pdf - Rev. G 10/12 EN
1 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2009 Micron Technology, Inc. All rights reserved.
‡Products and specifications discussed herein are for evaluation and reference purposes only and are subject to change by
Micron without notice. Products are only warranted by Micron to meet Micron's production data sheet specifications.
1 page  
Micron Confidential and Proprietary
Advance
4Gb x1: SPI NAND Flash Memory
Features
List of Tables
Table 1: NAND Flash SPI Parameters ................................................................................................................ 1
Table 2: SPI Ball Descriptions ........................................................................................................................... 9
Table 3: SPI NAND Command Set .................................................................................................................. 13
Table 4: Features Settings .............................................................................................................................. 15
Table 5: READ ID Table .................................................................................................................................. 21
Table 6: Parameter Page Data Structure .......................................................................................................... 23
Table 7: Block Lock Register Block Protect Bits ................................................................................................ 31
Table 8: OTP States ........................................................................................................................................ 32
Table 9: Status Register Bit Descriptions ......................................................................................................... 33
Table 10: Error Management Details .............................................................................................................. 34
Table 11: ECC Protection ............................................................................................................................... 36
Table 12: ECC Status ...................................................................................................................................... 36
Table 13: Absolute Maximum Ratings ............................................................................................................. 38
Table 14: SPI Mode Electrical Characteristics .................................................................................................. 38
Table 15: DC Characteristics .......................................................................................................................... 38
Table 16: General Timing Characteristics (SPI) ............................................................................................... 38
Table 17: PROGRAM/READ/ERASE Timing Characteristics (SPI) ..................................................................... 39
PDF: 09005aef839b1d72
4gb_nand_spi_m60a.pdf - Rev. G 10/12 EN
5 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2009 Micron Technology, Inc. All rights reserved.
5 Page 
Micron Confidential and Proprietary
Advance
4Gb x1: SPI NAND Flash Memory
Bus Operation
Bus Operation
SPI Modes
SPI NAND supports two SPI modes:
• CPOL = 0, CPHA = 0 (Mode 0)
• CPOL = 1, CPHA = 1 (Mode 3)
Input data is latched in on the rising edge of SCK, and output data is available from the
falling edge of SCK for both modes.
When the bus master is in standby mode:
• SCK remains at 0 for (CPOL = 0, CPHA = 0 Mode 0)
• SCK remains at 1 for (CPOL = 1, CPHA = 1 Mode 3)
All timing diagrams shown in this data sheet are mode 0.
Figure 6: SPI Modes Timing
CPOL CPHA
0 0 SCK
1 1 SCK
SI
SO
CS#
CS#
SCK
HOLD#/SO3
MSB
LSB
MSB
LSB
Note: 1. While CS# is HIGH, keep SCK at VCC or GND (determined by mode 0 or mode 3). Do not
begin toggling SCK until after CS# is driven LOW.
Chip select (CS#) activates or deactivates the device. When CS goes LOW, the device is
placed in active mode. When CS is HIGH, the device is placed in inactive mode and SO
is High-Z.
Serial clock (SCK) provides interface timing for SPI NAND. Addresses, data, and com-
mands are latched on the rising edge of SCK. Data is placed on SO at the falling edge of
SCK. When CS# is HIGH, SCK must return either HIGH or LOW.
HOLD# input provides a method to pause serial communication with the device but
does not terminate any ERASE, READ, or WRITE operation currently in progress.
Hold mode starts at the falling edge of HOLD# provided SCK is also LOW. If SCK is HIGH
when HOLD# goes LOW, hold mode begins after the next falling edge of SCK. Similarly,
PDF: 09005aef839b1d72
4gb_nand_spi_m60a.pdf - Rev. G 10/12 EN
11
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2009 Micron Technology, Inc. All rights reserved.
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