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PDF TB62705CP Data sheet ( Hoja de datos )
| Número de pieza | TB62705CP | |
| Descripción | 8BIT SHIFT REGISTER / LATCHES & CONSTANT CURRENT DRIVERS | |
| Fabricantes | Toshiba | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de TB62705CP (archivo pdf) en la parte inferior de esta página. Total 17 Páginas | ||
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TB62705CP/CF/CFN
TOSHIBA Bi−CMOS INTEGRATED CIRCUIT SILICON MONOLITHIC
TB62705CP,TB62705CF,TB62705CFN
8-BIT SHIFT REGISTER, LATCHES & CONSTANT-CURRENT DRIVERS
The TB62705CP / CF / CFN are specifically designed for LED and
LED DISPLAY constant-current drivers.
These constant-current output circuits can support the set-up of
an external resistor (IOUT = 5~90mA).
This IC is a monolithic integrated circuit designed to be used
together with Bi-CMOS process.
The devices consist of an 8-bit shift register, latch, AND-GATE
and constant-current drivers.
FEATURES
z Constant-current Output : current with one resistor for
5 to 90mA.
z Maximum Clock Frequency : fCLK = 15 (MHz)
(Cascade Connecte Operate,
Topr = 25°C)
z 5V C−MOS Compatible Input
z Package
: DIP16−P−300−2.54A (TB62705CP)
SSOP16−P−225−1.00A (TB62705CF)
SSOP16−P−225−0.65B (TB62705CFN)
z Constant Output Current Matching:
OUTPUT-GND
VOLTAGE
≥ 0.4 V
≥ 0.7 V
CURRENT
MATCHING
±6.0%
±6.0%
OUTPUT
CURRENT
5~40 mA
5~90 mA
TB62705CP
TB62705CF
TB62705CFN
PIN CONNECTION (Top view)
GND
SERIAL-IN
CLOCK
LATCH
OUTn
OUTn
OUTn
OUTn
1
2
3
4
5
6
7
8
16 VDD
15 R-EXT
14 SERIAL-OUT
13 ENABLE
12 OUTn
11 OUTn
10 OUTn
9 OUTn
Weight
DIP16-P-300-2.54A: 1.11 g (typ.)
SSOP16-P-225-1.00A: 0.14 g (typ.)
SSOP16-P-225-0.65B: 0.07 g (typ.)
1 2006-06-13
1 page  
TB62705CP/CF/CFN
ELECTRICAL CHARACTERISTICS (VDD = 5.0 V, Ta = 25°C unless otherwise stated)
CHARACTERISTIC
Input Voltage
"H" Level
"L" Level
Output Leakage Current
Output Voltage
S−OUT
Output Current 1
Current Skew
SYMBOL
VIH
VIL
IOH
VOL
VOH
IOL1
IOL2
∆IOL1
TEST
CIR−
CUIT
―
CONDITION
―
――
― VOH = 15.0 V
― IOL = 1.0 mA
― IOH = −1.0 mA
― VCE = 0.7 V REXT = 470 Ω
― VCE = 0.4 V (Include skew)
―
IO = 40 mA,
VCE = 0.4 V
REXT = 470 Ω
MIN TYP.
0.7
VDD
GND
―
―
――
――
4.6 ―
34.1 40.0
33.7 39.5
― ±1.5
MAX UNIT
VDD
0.3
VDD
10
0.4
―
45.9
45.3
±6.0
V
µA
V
mA
%
Output Current 2
Current Skew
Supply Voltage Regulation
Pull−Up Resistor
Pull−Down Resistor
Supply Current
"OFF"
"ON"
IOL3
IOL4
∆IOL2
% / VDD
RIN (up)
RIN (down)
IDD (off) 1
IDD (off) 2
IDD (off) 3
IDD (on) 1
IDD (on) 2
― VCE = 1.0 V
― VCE = 0.7 V
REXT = 250 Ω
(Include skew)
64.2
63.8
―
IO = 75 mA,
VCE = 0.7 V
REXT = 250 Ω
―
― REXT = 470 Ω, Ta = −40~85°C ―
― ― 150
― ― 100
― REXT = OPEN, OUT0 ~ 7 = off
― REXT = 470 Ω, OUT0 ~ 7 = off
― REXT = 250 Ω, OUT0 ~ 7 = off
― REXT = 470 Ω, OUT0 ~ 7 = on
― REXT = 250 Ω, OUT0 ~ 7 = on
―
3.5
6.5
7.0
10.0
75.5
75.0
±1.5
1.5
300
200
0.6
5.8
10.7
12.0
22.0
86.8
mA
86.2
±6.0 %
5.0 % / V
600 Ω
400 Ω
1.2
8.0
15.0 mA
18.0
32.0
5 2006-06-13
5 Page 
TB62705CP/CF/CFN
[1] Output current (IOUT)
IOUT is set by the external resistor (R−EXT), as shown in Fig. 1.
[2] Total supply voltage (VLED)
This device can operate on 0.4~0.7 V (VO).
When a higher voltage is input to the device, the excess voltage is consumed inside the device, which leads to
power dissipation. To minimize power dissipation and loss, we recommend that the total supply voltage be set
as follows:
VLED (total supply voltage) = VCE (Tr Vsat) + Vf (LED forward voltage) + VO (IC supply voltage).
When the total supply is too high in the light of the power dissipation of this device, an additional resistor (R)
can be used to decrease the supply voltage (VO).
PATTERN LAYOUT
OUTn
OUTn
OUTn
OUTn
[3] Pattern layout
This device has only one ground pin, i.e., the combined signal ground pin and power ground pin.
If the ground pattern layout contains a large amount of inductance and impedance, and the voltage between
the ground and LATCH or CLOCK terminals exceeds 2.5 V due to switching noise, the device may not operate
correctly. Be sure to pay attention to pattern layout to minimize inductance.
11 2006-06-13
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet TB62705CP.PDF ] | |
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