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PDF TC358768XBG Data sheet ( Hoja de datos )

Número de pieza TC358768XBG
Descripción Parallel Port to MIPI DSI
Fabricantes Toshiba 
Logotipo Toshiba Logotipo



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No Preview Available ! TC358768XBG Hoja de datos, Descripción, Manual

Functional SpecificationWMWOWWYCT10WWW.MW.0OWW.YCT10WWW.MWW.0OWW.YCT10WWW.MWW.0O.WW.YCT10WWW.MWW.0O.WW.YCT110WWW0.MWW.0O.WW.YCT1100WWW0TAo.MWW.0O.YWW.YCrCT1l10lu0W3.WrWs0.MWWi.50O.YWeW.gYCT1d81h00W7t.fWW0.MsWWo6.0O.YCWW.YCrTr1810e0aWXs.WWn0O.MWWe.0O.YBCWW.YyCrT11vG00pWe.WMW0O.uMWWd.0O.YCWFW.YCrT.1p1u00TWo.nWMW.0O.MWhWs.0O.YCWWc.YCeiT1ts10i0oWo.WMmW.0O.MtWW.0O.nYCWhW.TYCaT1ae10t0rWle.MW.0O.MWWrWSt.0O.YCWW.ihTYCT1ap1a0l0Wen.MW.0iO.MWW.0O.cYsCWW.TYaCT1sr100eW.MnW.0Op.MWW.0O.YCWWe.TYCrT1ei10n0TdW.MWt.0O.MeWW.0Oe.YCWC.TYdCdTC1100tWow.3MoW.0O.MWWp.0O.YCWiTYCs5Ty1tu0hr0Wp.8iMW.0O.MtWgW.O.YCpWhTYCh7T1oe0Wt0rW6.pMW.0O.MWW.O.YCWetTYC8T1hTr20MWmeWX0.MW.0O.MWWi.OI.uY0CWCTsCPT1sB5s0WIei-WW.MoW2T.A0OMWWoG.O.YCWn30TfTl100lWotiWW8e.hMaWfW5.0OMFWW..YCWneTMtT1hc0upWn8eeWWI.rMWW.0PO.MWWo.n.MYMCWT1IdT17t0WcAueIWW.PMWamCWc.0O.WWl..tYCW6ItlT1sbT1iioA0aWoetWoWn0.MW8Wrl.0O.nWfW.lYicCWnT1iC1eT0avf0WX,onWoaW0i.MWW.I0nO.YcWsW.YdCnelT1feh10ciB,0iWde..bWSWI0.MWWe.0O.YACnWaW.YCnnT1cp10lAtG0.lWit.WWa0.mMeNWrW.0O.YCWWili.YC.T1goeac100hrW.WpWi0O.tiMlWWc.0O.YCWsWa.fYCaT1r1ir0t0eWEc(.WMW0O.ssMWW.0O.YlCWWe).YCaeT1r1c0o0vWtt.fWMW.0Oer.MWWi.0O.YCWoWt.dYCohT1n1.00iWis.nWMWc.0O.MWW.0O.YCWWd.TYCCT11o00Woc.MW.0O.MWWmWu.0O.YCWW.TYCmT1p100Woe.MW.0O.MWW.n0O.nYCWW.TYCTt1e100nmW.MW.0tO.MWW.0O.YsCWaW.TYC,T1y10I0Wn.bMW.0O.MWW.0O.YCWce.TYCT1.10d0W.iMW.0O.MWsW.0O.YCWRTYcCT1l00oWe.MWP.0O.MsWW.O.YCWTYeCvT1ad00Wg,.MW.0O.MW0W.O.rYCWeTYCeT1.0pW31.rMW.0O.MWWo.O.YCWTC2dT1o0uW.fMWc.0OMWW.O.YCWeT9T1d02W.MW.0OMWW..YCWTT10W.MW.0OMWW..YCWTT10W.MW.0OWW..YCWTT10W.MW.0OWW.YCWT10W.MW.0OWW.YCT1

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TC358768XBG pdf
WWWWWW. W.10.100Y0.0Y0.YC.OCMOM.OM.T.WTWW WWWWWWW.1W.10.100Y0.YC0.YC.OCMOM. M.T.WTWTC358768XBG Functional Specification
Rev 0.32
WWWWW.1 .100Y.YC.COM.T.TW WWWWW.10.100Y.C.OCOM.T.WTWTable of content
WW W.100 Y.COM .TW WWW .100Y .COM .TW1 Overview .......................................................................................................................11
WW .100 OM W WW 00Y OM W2 Features ....................................................................................................................... 12
WW 00Y.C OM.T W W W.1 0Y.C M.T3 External Pins................................................................................................................ 14
W W.1 Y.C .T WW .10 .CO .TW3.1 TC358768XBG BGA72 Pin Count Summary ............................ ................. ........... 15
W W 00 OM W W 0Y M3.2 Pin Layout .............................................................................................................. 16
W W.1 Y.C .T WW .10 .CO .TW3.3 System Overview.................................................................................................... 17
TW WW .100 OM W WW 00Y OM W3.4 DSI TX Protocol ...................................................................................................... 18
W Y.C .T W .1 .C .T3.4.1 Video Mode Transmission .......................................................................................... 19
.TW WW .100 OM W WW 00Y OM W3.4.2 Pixel Format ................................................................................................................ 19
M W Y.C .T W .1 .C .T3.5 DSI TX Video Packet Operation............................................................................. 20
.TW WW .100 OM W WW 00Y OM W3.6 DSI TX Command Packet Operation ...................................................................... 21
OM W W 0Y.C M.T W W.1 Y.C .T3.6.1 TX Short Packet (DCS) Write Command ................................................................... 21
.T WW .10 O W W 00 OM W3.6.2 TX Long Packet Write Command ............................................................................... 22
OM W W 0Y.C M.T W W.1 Y.C .T3.6.3 TX (Short) Packet Read Command ............................................................................ 23
C M.T WW W.10 Y.CO .TW WW .100 OM W3.7 Parallel Input (RGB)................................................................................................ 25
O W W 00 OM W W 0Y.C M.T3.7.1 Overview ..................................................................................................................... 25
Y.C M.T W W.1 Y.C .T WW .10 .CO .TW3.7.2 Timing Diagrams for Video signals (Vsync and Hsync) ............................................. 26
O W W 00 OM W W 0Y M3.8 I2C Slave Interface ................................................................................................. 27
0Y.C M.T W W.1 Y.C .T WW .10 .CO .T3.8.1 Overview ..................................................................................................................... 27
O W W 00 OM W W 0Y M3.8.2 I2C Write Access Translation...................................................................................... 27
0Y.C M.T W W.1 Y.C .T WW .10 .CO3.8.3 I2C Read Access Translation .................... ................................................................ 27
10 O W W 00 OM W W 0Y M3.9 SPI Slave Interface ................................................................................................. 29
0Y.C M.T W W.1 Y.C .T WW .10 .CO3.9.1 Clocking Modes........................................................................................................... 30
.10 O W W 00 OM W W 0Y3.9.1.1 Timing Diagram ................................................................................................. 30
W 0Y.C M.T W W.1 Y.C .T WW .10 .CO3.9.1.2 Providing Register Address over SPI Interface................................................. 30
.10 O W W 00 OM W W 0Y3.9.1.3 SPI Write Access Translation............................................................................ 31
W 0Y.C M.T W W.1 Y.C .T WW .10 .C3.9.1.4 SPI Read Access Translation............................................................................ 31
W .10 O W W 00 OM W W 0Y3.9.2 Full Duplex .................................................................................................................. 32
W 0Y.C M.T W W.1 Y.C .T WW .103.9.2.1 Back-2-back writes ............................................................................................ 33
WW .10 O W W 00 OM W W 0Y3.9.2.2 Back-2-back reads............................................................................................. 33
W 0Y.C M.T W W.1 Y.C .T WW .103.9.2.3 Write-after-Read ................................................................................................ 34
W 0 O W 0 M W3.9.2.4 Read-after-Write ................................................................................................ 34
W W.1 0Y.C M.T WW W.10 Y.CO .TW WW .103.9.2.5 NOP-after-Read................................................................................................. 35
WW W.10 Y.CO .TW WW .100 OM W WW4 Clock and System........................................................................................................ 36
W 00 OM W W 0Y.C M.T W W.14.1.1 Example of PLL Generated Clock Frequency ............................................................ 36
W W.1 Y.C .T WW .10 O W W4.1.2 TC358768XBG Power Up Procedure......................................................................... 37
W 00 OM W W 0Y.C M.T W W4.1.3 TC358768XBG Power Down Procedure .................................................................... 38
W W.1 0Y.C M.T WW W.10 Y.CO .TW WW5 RegFile Block............................................................................................................... 39
WW W.10 Y.CO .TW WW .100 OM W W5.1 Register Map .......................................................................................................... 39
0 M W Y.C .T W5.2 Register Description ............................................................................................... 41
WW .10 O W W 00 OM W5.2.1 Chip and Revision ID (ChipID: 0x0000)...................................................................... 41
W 0Y.C M.T W W.1 Y.C .T W5.2.2 System Control Register (SysCtl:0x0002) .................................................................. 41
WW .10 O W W 00 OM W5.2.3 Input Control Register (InputCtl: 0x0004) ................................................................... 41
W 0Y.C M.T W W.1 Y.C .T5.2.4 FiFo Control Register (FiFoCtl: 0x0006)..................................................................... 42
WW .10 O W W 00 OM W5.2.5 Data Format Control Register (DataFmt: 0x0008) ..................................................... 43
WWWW.100Y.YC.COM.T.TW WWWW.1 .100Y.C.COM.T.TWTC358768XBG Functional Spec
Confidential
Page 5 of 92
W 00 OM W W 0Y MCopyright © 2005-2008 MIPI Alliance, Inc. All rights reserved.
W W.1 Y.C .T WW .10 .CO .TWMIPI Alliance Member Confidential.
W 00 OM W W 0Y MAll rights reserved. This material is reprinted with the permission of the MIPI Alliance, Inc. No part(s) of this document may be disclosed, reproduced
WWWWW.1 .100Y0.YC.COMM.T.TW WWWWWW.10.100Y0.YC.OCOMM.T.WTWor used for any purpose other than as needed to support the use of the products of Toshiba America Electronic Components, Inc.

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TC358768XBG arduino
WMWOWWYCT10WWW.MW.0OWW.YCT10WWW.MWW.0OWW.YCT10WWW.MWW.0O.WW.YCT10WWW.MWW.0O.WW.YCT110WWW0.MWW.0O.WW.YCT1100WWW0TAo1.MWW.0O.YWW.YCrCT1l10lu0W3.WrWs0i.TMWWi.50O.YWenW.gYCT1d8h1h0Ot0W7et.fWWe0.MsWWo6.0O.YCWW.YCvrrTr1810neP0aWXes.WWn0O.MaWWe.0O.YBCWaW.rYyCrT1l1vG0vr0pWe.WMraW0O.uMWWid.0O.YCWeFW.YCrelHT.1pl1u0g0TeWow.nWMW.0O.MOWhWis.0O.YCWlWc.sYCeiT1ts10Pti0SoWo.eWMmW.0O.MtWW.0oO.nYCWhW.TYCTraT1Fae10rst0rWlet.MiW.0O.MWWrWStg.0O.YCWWc.ihTYCtT1apo1ua0al0Wen.MW.0iO.rMWWn.0O.cYsCWWM.TYaCe(T1sr10V0eWb.IMn1W.0Op.MWWP.S0O.YCWWee.TYCr(-T1ei1101YIn0TdW.MaWt6.0O.MeWW.ND0Oe.YCWSC.TYdCcd/TC1I(101Cy0S2tRWcow.3MoW.0O.8MWWps.0CO.YCWe/IiTYGCs5HTy1t/tu0hs2/r0(eWSBp.8iMWST.0O.MtWsg4W.O.YCpmWhTYChP7T)1Yo-Ce0Wtt0brWI6.pMhWN.0O.MOW3W.O.YCWietTYC8rtT1hrC520Mv)oWmeWX0.MW8.0O./MeWWui.OI.uY0CWDTsCPT17rsB5sg0WIeviE-WW6.MoW2.A0hOMWWoG.O.iYTCWn)0T8efTl100lWoICtiwWXW8.hM2aWfW.0OMFWWC..YCWneTMtB3CT1hcw0upWoeeWWI5G.rMWW.0PO.MWWo.ni.MYMCoWTn1tI8dT1DD)0hrWcTAueIWWv7.PMWmCWc.0O.iWWlPS.S.tYCWsoItTlT1e6sbT1iioA0aWPoCeIIWoWar8n0.MWWrl.0O.nWfW.lYcCWtI3nT1iCX1eT.0aebf05W,onWoaW0i.MBWrWr.I0nO.YcW8sW..YdCnilT1fehd107ci,G0iWde..bWSWgI06.MWWe.0O.YACnWaW.YCnn8T1ecp10lAt0.lWiXt.WWa(0.mMeNWrW.d0O.YCWWi1li.YCB.T1goeac1e0-0hrWG.4WpWiC0O.tiMvDDDlWDWc.0O.YCWsWa.fYCaT1irDP1ir00231cit0eWEc(n.WMWPPP0O.Pes/sMaWW.0O.YlCWWCDe).YCaeT1t///R/r1c0otDDD0avDWNStt.fWMWh.0Oer.MGWWi.0O.YCWoW023t1.dIYCLoahT1n1.0BNNNN0iWaits.nWMWc.0O.MWW.0O.YCWnWd.TYcCtCT11o0oeo0Woc.MW.0O.MWWmsWu.0O.nYCWWD.TYCmT1)p10v0WSoe.MW.0eO.MWW.n0O.nYCWW.ITYCTt1er-100ntTmW.MWs.0tO.MWW.0O.YsCWaXW.TYC,T1y10RI0Wn.bMW.0O.MWW.0O.YCWcGe.TYCTP1.10d0WDB.iMW.0O.aMWsW.0O.YCWRTYcCT1SnPl0t0oWoe.MW.0Oe.aMsWIW.O.YCWTYeCvT1gDld00We,.MW.0O.MW0SW.O.rYCWTYCeT11.0pIW3.1.rMW.0O.MWWo.O.YCWTC2dT1oA0uW.fMWc.0OMlWW.O.YCWleT9T1d02W.MW.0OMWW..YCWTT10W.MW.0OMWW..YCWTT10W.MW.0OWW..YCWTT10W.MW.0OWW.YCWT10W.MW.0OWW.YCT1

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