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PDF STFI13N80K5 Data sheet ( Hoja de datos )

Número de pieza STFI13N80K5
Descripción N-channel Power MOSFET
Fabricantes STMicroelectronics 
Logotipo STMicroelectronics Logotipo



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No Preview Available ! STFI13N80K5 Hoja de datos, Descripción, Manual

STFI13N80K5
N-channel 800 V, 0.37 typ.,12 A MDmesh™ K5
Power MOSFET in an I²PAKFP package
Datasheet - production data
Features
1 23
I2PAKFP
Figure 1. Internal schematic diagram
D(2)
Order code VDS
STFI13N80K5 800 V
RDS(on)
0.45
ID
12 A
PTOT
35 W
Fully insulated and low profile package with
increased creepage path from pin to heatsink
plate
Industry’s lowest RDS(on) x area
Industry’s best figure of merit (FoM)
Ultra low gate charge
100% avalanche tested
Zener-protected
Applications
Switching applications
G(1)
S(3)
AM01476v1
Description
This very high voltage N-channel Power MOSFET
is designed using MDmesh™ K5 technology
based on an innovative proprietary vertical
structure. The result is a dramatic reduction in on-
resistance and ultra-low gate charge for
applications requiring superior power density and
high efficiency.
Order code
STFI13N80K5
Table 1. Device summary
Marking
Package
13N80K5
I²PAKFP (TO-281)
Packaging
Tube
December 2014
This is information on a product in full production.
DocID027200 Rev 2
1/13
www.st.com
13

1 page




STFI13N80K5 pdf
STFI13N80K5
Electrical characteristics
Table 6. Switching times
Symbol
Parameter
Test conditions
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off delay time
Fall time
VDD = 400 V, ID = 6A,
RG=4.7 , VGS=10 V
(see Figure 18)
Min. Typ. Max. Unit
- 16 - ns
- 16 - ns
- 42 - ns
- 16 - ns
Table 7. Source drain diode
Symbol
Parameter
Test conditions
ISD Source-drain current
ISDM
VSD(1)
Source-drain current (pulsed)
Forward on voltage
VGS=0, ISD= 12 A
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD= 12 A, VDD= 60 V
di/dt = 100 A/µs,
(see Figure 17)
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD= 12 A,VDD= 60 V
di/dt=100 A/µs,
Tj=150 °C
(see Figure 17)
1. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Min. Typ. Max. Unit
- 14 A
- 56 A
- 1.5 V
- 406
ns
- 5.7
µC
- 28
A
- 600
ns
- 7.9
µC
- 26
A
Table 8. Gate-source Zener diode
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
V(BR)GSO Gate-source breakdown voltage IGS= ± 1mA, ID= 0
30 - - V
The built-in back-to-back Zener diodes have been specifically designed to enhance the ESD
capability of the device. The Zener voltage is appropriate for efficient and cost-effective
intervention to protect the device integrity. These integrated Zener diodes thus eliminate the
need for external components.
DocID027200 Rev 2
5/13

5 Page





STFI13N80K5 arduino
STFI13N80K5
Dim.
A
B
D
D1
E
F
F1
G
H
L1
L2
L3
L4
L5
L6
Package mechanical data
Table 9. I2PAKFP (TO-281) mechanical data
mm
Min.
4.40
2.50
2.50
0.65
0.45
0.75
Typ.
-
4.95
10.00
21.00
13.20
10.55
2.70
0.85
7.50
7.60
Max.
4.60
2.70
2.75
0.85
0.70
1.00
1.20
5.20
10.40
23.00
14.10
10.85
3.20
1.25
7.70
DocID027200 Rev 2
11/13

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