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PDF HT48F30E Data sheet ( Hoja de datos )
| Número de pieza | HT48F30E | |
| Descripción | I/O Flash Type MCU | |
| Fabricantes | Holtek Semiconductor | |
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HT48F06E/HT48F10E/HT48F30E
I/O Flash Type MCU with EEPROM
Technical Document
· Tools Information
· FAQs
· Application Note
- HA0075E MCU Reset and Oscillator Circuits Application Note
- HA0122E HT48F MCU Series - Using Assembly Language to Write to the 1K EEPROM Data Memory
- HA0123E HT48F MCU Series - Using C Language to Write to the 1K EEPROM Data Memory
- HA0124E HT48F MCU Series - Using Assembly Language to Write to the 2K EEPROM Data Memory
- HA0125E HT48F MCU Series - Using C Language to Write to the 2K EEPROM Data Memory
Features
· Operating voltage:
fSYS=4MHz: 2.2V~5.5V
fSYS=8MHz: 3.3V~5.5V
fSYS=12MHz: 4.5V~5.5V
· Multi-programmable Flash Type Program Memory
· EEPROM data memory: 128´8
· From 13 to 23 Bidirectional I/O with Pull-high Options
· External Interrupt Input
· Full Timer Functions with Prescaler and Interrupt
· Timer External Input
· Crystal and RC System Oscillator
· Watchdog Timer Function
· PFD/Buzzer Driver Outputs
· Power Down and Wake-up Feature for Power Saving
Operation
· Up to 0.5ms instruction cycle with 8MHz system clock
at VDD=5V
· Bit Manipulation Instructions
· Table Read Function
· 63 Powerful Instructions
· All Instructions executed in 1 or 2 Machine Cycles
· Low Voltage Reset Function
· Flash program memory can be re-programmed up to
100,000 times
· Flash program memory data retention > 10 years
· EEPROM data memory can be re-programmed up to
1,000,000 times
· EEPROM data memory data retention > 10 years
· ISP (In-System Programming) interface
· Full Suite of Supported Hardware and Software
Tools Available
General Description
The HT48F06E, HT48F10E and HT48F30E are 8-bit
high-performance, RISC architecture microcontroller
devices specifically designed for multiple I/O control
product applications. Device flexibility is enhanced with
their internal special features such as power-down and
wake-up functions, oscillator options, buzzer driver, etc.
These features combine to ensure applications require
a minimum of external components and therefore re-
duce overall product costs.
Having the advantages of low-power consumption,
high-performance, I/O flexibility as well as low-cost,
these devices have the versatility to suit a wide range of
application possibilities such as industrial control, con-
sumer products, subsystem controllers, etc. Many fea-
tures are common to all devices, however, they differ in
areas such as I/O pin count, Program Memory and Data
Memory capacity, package types, etc.
All devices utilise a Flash type Program Memory, and
therefore have multi-programmable capabilities offering
the advantages of easy and efficient program updates.
The non-volatile internal EEPROM also offers the capa-
bility of storing information such as product part num-
bers, calibration data and other specific product
information. etc. The devices are fully supported by the
Holtek range of fully functional development and pro-
gramming tools, providing a means for fast and efficient
product development cycles.
Rev. 1.60
1 July 29, 2009
1 page  
HT48F06E/HT48F10E/HT48F30E
D.C. Characteristics
Symbol
Parameter
VDD Operating Voltage
Test Conditions
VDD Conditions
¾ fSYS=4MHz
¾ fSYS=8MHz
¾ fSYS=12MHz
3V
IDD1 Operating Current (Crystal OSC)
No load, fSYS=4MHz
5V
3V
IDD2 Operating Current (RC OSC)
No load, fSYS=4MHz
5V
IDD3
Operating Current
(Crystal OSC, RC OSC)
5V No load, fSYS=8MHz
ISTB1
Standby Current (WDT Enabled)
3V No load,
5V system HALT
ISTB2
Standby Current (WDT Disabled)
3V
5V
No load,
system HALT
VIL1
VIH1
VIL2
VIH2
VLVR
Input Low Voltage for I/O Ports
Input High Voltage for I/O Ports
Input Low Voltage (RES)
Input High Voltage (RES)
Low Voltage Reset
¾¾
¾¾
¾¾
¾¾
¾ LVR enabled
IOL I/O Port Sink Current
3V
VOL=0.1VDD
5V
IOH I/O Port Source Current
3V
VOH=0.9VDD
5V
RPH Pull-high Resistance
3V ¾
5V ¾
Ta=25°C
Min. Typ. Max. Unit
2.2 ¾ 5.5 V
3.3 ¾ 5.5 V
4.5 ¾ 5.5 V
¾ 0.6 1.5 mA
¾2
4 mA
¾ 0.8 1.5 mA
¾ 2.5 4 mA
¾4
8 mA
¾ ¾ 5 mA
¾ ¾ 10 mA
¾ ¾ 1 mA
¾ ¾ 2 mA
0 ¾ 0.3VDD
0.7VDD ¾
VDD
0 ¾ 0.4VDD
0.9VDD ¾
VDD
V
V
V
V
2.7 3.0 3.3
V
4 8 ¾ mA
10 20 ¾ mA
-2 -4 ¾ mA
-5 -10 ¾ mA
20 60 100 kW
10 30 50 kW
A.C. Characteristics
Symbol
Parameter
fSYS
System Clock
(RC OSC, Crystal OSC)
fTIMER Timer I/P Frequency (TMR)
tWDTOSC Watchdog Oscillator Period
Test Conditions
VDD Conditions
¾ 2.2V~5.5V
¾ 3.3V~5.5V
¾ 4.5V~5.5V
¾ 2.2V~5.5V
¾ 3.3V~5.5V
3V ¾
5V ¾
Ta=25°C
Min.
400
400
400
0
0
45
32
Typ. Max. Unit
¾ 4000 kHz
¾ 8000 kHz
¾ 12000 kHz
¾ 4000 kHz
¾ 8000 kHz
90 180 ms
65 130 ms
Rev. 1.60
5 July 29, 2009
5 Page 
HT48F06E/HT48F10E/HT48F30E
· Location 008H
This internal vector is used by the Timer/Event Coun-
ter. If a counter overflow occurs, the program will jump
to this location and begin execution if the timer/event
counter interrupt is enabled and the stack is not full.
Look-up Table
Any location within the Program Memory can be defined
as a look-up table where programmers can store fixed
data. To use the look-up table, the table pointer must
first be setup by placing the lower order address of the
look up data to be retrieved in the table pointer register,
TBLP. This register defines the lower 8-bit address of
the look-up table.
After setting up the table pointer, the table data can be
retrieved from the current Program Memory page or last
Program Memory page using the ²TABRDC[m]² or
²TABRDL [m]² instructions, respectively. When these in-
structions are executed, the lower order table byte from
the Program Memory will be transferred to the user de-
fined Data Memory register [m] as specified in the in-
struction. The higher order table data byte from the
Program Memory will be transferred to the TBLH special
register. Any unused bits in this transferred higher order
byte will have uncertain values.
The following diagram illustrates the addressing/data
flow of the look-up table:
P ro g ra m C o u n te r
H ig h B y te
TB LP
P ro g ra m
M e m o ry
TB LH
H ig h B y te o f T a b le C o n te n ts
S p e c ifie d b y [m ]
L o w B y te o f T a b le C o n te n ts
Look-up Table
Table Program Example
The following example shows how the table pointer and
table data is defined and retrieved from the HT48F06E
or HT48F10E devices. This example uses raw table
data located in the last page which is stored there using
the ORG statement. The value at this ORG statement is
²300H² which refers to the start address of the last page
within the 1K Program Memory of the microcontroller.
The table pointer is setup here to have an initial value of
²06H². This will ensure that the first data read from the
data table will be at the Program Memory address
²306H² or 6 locations after the start of the last page.
Note that the value for the table pointer is referenced to
the first address of the present page if the ²TABRDC
[m]² instruction is being used. The high byte of the table
data which in this case is equal to zero will be trans-
ferred to the TBLH register automatically when the
²TABRDL [m]² instruction is executed.
tempreg1
tempreg2
mov
mov
tabrdl
dec
tabrdl
org
dc
db ?
db ?
:
:
a,06h
tblp,a
:
:
tempreg1
tblp
; temporary register #1
; temporary register #2
; initialise table pointer - note that this address
; is referenced
; to the last page or present page
; transfers value in table referenced by table pointer
; to tempregl
; data at prog. memory address ²306H² transferred to
; tempreg1 and TBLH
; reduce value of table pointer by one
tempreg2
:
:
300h
; transfers value in table referenced by table pointer
; to tempreg2
; data at prog.memory address ²305H² transferred to
; tempreg2 and TBLH
; in this example the data ²1AH² is transferred to
; tempreg1 and data ²0FH² to register tempreg2
; sets initial address of HT48F06E or HT48F10E last page
00Ah, 00Bh, 00Ch, 00Dh, 00Eh, 00Fh, 01Ah, 01Bh
:
:
Rev. 1.60
11 July 29, 2009
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet HT48F30E.PDF ] | |
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