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NVP1114A PDF Datasheet - 4-Ch Video Decoder - Nextchip

Part Number NVP1114A
Description 4-Ch Video Decoder
Manufacturers Nextchip 
Logo Nextchip Logo 
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NVP1114A datasheet, circuit
NVP1114A
4-Ch Video Decoder with 4-Ch Audio Codec,
Video Encoder.
Information contained here is subject to change without notice.
Make sure to check and use an updated version of the Data sheet.
www.nextchip.com
2009.08.01.
REV 1.0

1 page

NVP1114A pdf, schematic
NVP1114A
4-Ch Video Decoder with 4-Ch Audio Codec, Video Encoder
4 Channel Video Decoder with 4-Ch Audio Codec, Video Encoder
: NVP1114A includes 4 Channel Video Decoder, 1 Channel Video Encoder and 4 Channel Audio Codec.
4 Channel Video Decoder delivers high quality images. It accepts separate 4 CVBS inputs from Camera,
TV, VCR and the other video signal sources. It digitizes and decodes NTSC/PAL video signal into digital
components video which represents 8-bit CCIR656 4:2:2 format with 27MHz, 54MHz and 108MHz
multiplexed. 1 Channel Video Encoder plays the roles of converting the digital ITU-R BT.656 format data
into CVBS, Y and C in 10bit resolution. And there is 2-Ch DAC which is fed from the above video
encoder. 4 Channel Audio Codec has four ADC and one DAC. Built-in voice controller can generate digital
outputs for recording/mixing and accepts digital input for playback.
Features
Video Decoder
-. 4-Ch Video Decoder which accepts 4-CVBS
-. Output in CCIR656 4:2:2 format with 27/54/108MHz
-. On Chip Analog CLAMP/AGC and Anti-aliasing Filter
-. Accepts NTSC-M/J/4.43, PAL-M/N/B/D/G/H/I/60
-. Robust Sync detection for weak, non-standard signal
-. High-performance 3H/5H 2D adaptive comb filter
-. White Peak Detection & Peak AGC
-. Programmable peaking filter for Luminance
-. Vertical Peaking filter
-. CTI (Chrominance Transient Improvement)
-. Color compensation for PAL
-. IF compensation filter
-. Robust No-video detection
-. Programmable brightness, contrast, saturation and hue
-. Motion Detection
Video Encoder
-. Supports NTSC/PAL
-. 2 Analog outputs
: 2*10bits DAC for generating 2*CVBS or S-Video(Y/C)
-. Supports Internal Color Bar Pattern Generator
Ordering Information
Audio Codec
-. 4-Ch Voice Record, 1-Ch Playback
-. ∆∑ Modulator/Demodulator for ADC & DAC
-. Input/Output Analog Gain Control
-. 4 Channel PCM Voice Codec
: Linear PCM (8bits/16bits, 8K/16K)
: G.711 A-law/u-law (8bits, 8K/16K)
-. Input Mixing, Digital Volume, Mute Detection
-. I2S/SSP/DSP Interface (Master/Slave mode)
-. Cascade mode (up to 4 cascade support)
Applications
-. Video Security System
Related Products
-. NVS2200F
-. NVS3211
-. NVC1001
-. NVC1300/NVC1301
-. NVC1400/NVC1401
-. NVP3000
-. NVC1600
Device Package Temperature Range
NVP1114A 128TQFP
-10 ~ 80
2009.08.01. (REV 1.0)
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2 Page

NVP1114A equivalent
NVP1114A
4-Ch Video Decoder with 4-Ch Audio Codec, Video Encoder
5. I2C Wire Interface ····································································································································································· 37
5.1. Bank Operation ·································································································································································· 37
6. Register Description ································································································································································· 38
7. Electrical characteristics ························································································································································ 81
7.1 Absolute Maximum Ratings ············································································································································· 81
7.2 Recommended Operating Condition ···························································································································· 81
7.3 DC Characteristics ····························································································································································· 81
7.4 AC Characteristics ····························································································································································· 82
8. System Application ··································································································································································· 82
8.1 Recommended Register ················································································································································· 82
8.1.1 Order for NTSC Recommended Register Setting ······················································································· 83
8.1.2 Order for PAL Recommended Register Setting ······························································································· 85
8.2 Index of System Application ········································································································································ 87
8.3 4 Channel, Master Mode ··············································································································································· 89
8.3.1 Block Diagram (4 Channel, I2S Master Mode) ····························································································· 89
8.3.2 Circuit Configuration (4 Channel, I2S Master Mode) ·················································································· 90
8.4 4 Channel, Slave Mode ················································································································································· 91
8.4.1 Block Diagram (4 Channel, I2S Slave Mode) ································································································ 91
8.4.2 Circuit Configuration (4 Channel, I2S Slave Mode) ····················································································· 92
8.5 8 Channel, Master Mode ··············································································································································· 93
8.5.1 Block Diagram ·························································································································································· 93
8.5.2 Circuit Configuration ··············································································································································· 95
8.6 8 Channel, Slave Mode ················································································································································· 97
8.6.1 Block Diagram ·························································································································································· 97
8.6.2 Circuit Configuration ··············································································································································· 99
8.7 16 Channel, Master Mode ·········································································································································· 101
8.7.1 Block Diagram ························································································································································ 101
8.7.2 Circuit Configuration ············································································································································ 103
8.8 16 Channel, Slave Mode ············································································································································· 107
8.8.1 Block Diagram ························································································································································ 107
8.8.2 Circuit Configuration ············································································································································ 109
8.9 Register Setting ······························································································································································ 113
8.9.1 16 Channel, 16bit@16KHz, I2S Master/Slave Mode (NVP1114A Only) ··············································· 113
8.9.2 16 Channel, 8bit@16KHz, I2S Master/Slave Mode (NVP1114A Only) ················································· 114
8.9.3 16 Channel, 16bit@8KHz, I2S Master/Slave Mode (NVP1114 Only) ··················································· 115
8.9.4 16 Channel, 8bit@8KHz, I2S Master/Slave Mode (NVP1114A Only) ··················································· 116
8.9.5 16 Channel, 16bit@16KHz, I2S Master/Slave Mode (NVP1114A + NVP1104A) ······························· 117
8.9.6 16 Channel, 8bit@16KHz, I2S Master/Slave Mode (NVP1114A + NVP1104A) ································· 118
8.9.7 16 Channel, 16bit@8KHz, I2S Master/Slave Mode (NVP1114A + NVP1104A) ································· 119
8.9.8 16 Channel, 8bit@8KHz, I2S Master/Slave Mode (NVP1114A + NVP1104A) ··································· 120
8.10 Package Information ··················································································································································· 121
9. Revision History ··································································································································································· 122
10. Contact Information ····························································································································································· 122
2009.08.01. (REV 1.0)
5/122

5 Page

NVP1114A diode, scr
NVP1114A
4-Ch Video Decoder with 4-Ch Audio Codec, Video Encoder
2.2. Video Input Formats
: NVP1114A supports all NTSC/PAL Video Standard. Table 2.1 show NTSC/PAL Video Standards and Register
Setting Value (VIDEO FORMAT, BANK0, 0x20/30/40/50[4:0]) to support them.
VIDEO_FORMAT
0x00
0x11
0x1D
0x16
0x1F
0x15
FORMAT
NTSC-M,J
NTSC-4.43
PAL-B,D,G,H,I
PAL-M
PAL-Nc
PAL-60
LINE
525
525
625
525
625
525
HZ Fsc(MHz)
60 3.579545
60 4.43361875
50 4.43361875
60 3.57561149
50 3.58205625
60 4.433619
% Don't use auto-detect mode in case of NRT (Non Real Time) operation
Table 2.1. NVP1114A Input Video Image Formats
2.3. Analog Front End (CLAMP, AGC, Anti-aliasing Filter)
: NVP1114A includes 4 channel analog processing circuit that comprise anti-aliasing filter, ADC, AGC and
CLAMP. Because its design is dedicated for video application, Analog Processing circuit does not require
external reference circuit. External coupling capacitance only is needed for NVP1114A. Fig 2.2 demonstrates
the bode plot of Anti-aliasing Filter. Anti-aliasing Filter is controlled by Register (AFE_FIR_MODE, BANK0
0x61[0])
2009.08.01. (REV 1.0)
Figure 2.2 Anti-aliasing Filter characteristic
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NVP1114A transistor, igbt
NVP1114A
4-Ch Video Decoder with 4-Ch Audio Codec, Video Encoder
2.13. Scaler
: NVP1114A has 4 scalers. A Scaler plays a role to reduce input image size to the size user wants. Please
refer to the figure as below.
Figure 2.15 Function of Scaler
NVP1114A assigns each decoder to such channel. A User uses this scaler to control the size of input image
by 1/32 for horizontal and vertical direction. H-direction's size can be controlled by the
H_DTOx[19:0](0xC6~0xD1) register and V-direction's one by V_DTOx[19:0](0xCE~0xD9) register. The values of
H_DTOx and V_DTOx is determined by following formula.
NTSC : H_DTOx[19:0] = (HP_scaled/720)×(2^19)
V_DTOx[19:0] = (VP_scaled/240)×(2^19)
PAL : H_DTOx[19:0] = (HP_scaled/720)×(2^19)
V_DTOx[19:0] = (VP_scaled/288)×(2^19)
Where, HP_scaled indicates horizontal pixel number or the size of the image which a user wants to get.
VP_scaled does the same role as HP_scaled but for vertical direction.
For example of using this register, if you need 360x120 scaled image in NTSC, H_DTOx[19:0] shall have the
value of (360/720)×2^19. Simply, H_DTOx[19:0] = 2^18. And V_DTOx[19:0] becomes (120/240)×2^19. Again,
V_DTOx = 2^18
The table as below is register values for common scale sizes.
Registers
H_DTO1[19:16] (0xCE[3:0])
H_DTO1[15:8] (0xCA)
H_DTO1[7:0] (0xC6)
V_DTO1[19:16] (0xCE[7:4])
V_DTO1[15:8] (0xD6)
V_DTO1[7:0] (0xD2)
704x288 704x240 640x288 640x240 320x288 320x240 320x144 320x120
0x7 0x7 0x7 0x7 0x3 0x3 0x3 0x3
0xD2
0xD2 0x1C
0x1C
0x8E
0x8E
0x8E
0x8E
0x7D
0x7D
0x71
0x71
0x38
0x38
0x38
0x38
0x8 0x8 0x8 0x8 0x8 0x8 0x4 0x4
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
Table 2.4. Register Value for Scale used frequently
2009.08.01. (REV 1.0)
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