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PDF AX094F002F Data sheet ( Hoja de datos )

Número de pieza AX094F002F
Descripción IPS-Pro module
Fabricantes Hitachi 
Logotipo Hitachi Logotipo



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TECHNICAL DATA
AX094F002B
CONTENTS
No. Item
- COVER
- RECORD OF REVISION
- DESCRIPTION
1 ABSOLUTE MAXIMUM RATINGS
2 INITIAL OPTICAL CHARACTERISTICS
3 ELECTRICAL CHARACTERISTICS
4 BLOCK DIAGRAM
5 INTERFACE PIN ASSIGNMENT
6 INTERFACE TIMING
Date:Mar. 29, 2007
STD-2700-1
Page
1-1/1
2-1/1
3-1/1
4-1/1
5-1/2~2/2
6-1/2~2/2
7-1/1
8-1/7~7/7
9-1/3~3/3
IPS Alpha Technology,Ltd.
Date
Mar. 29, 2007
Sheet
No.
STD2700-1
Page 1-1/1

1 page




AX094F002F pdf
2. INITIAL OPTICAL CHARACTERISTICS
The following optical characteristics are measured under stable conditions. It takes about 30 minutes
to reach stable conditions. The measuring point is the center of display area unless otherwise noted.
The optical characteristics should be measured in a dark room or equivalent state.
  Measuring equipmentCS-1000A, or equivalent
Ambient Temperature =25℃、VDD=12.0Vf V=60Hz
Vin=24VBRT=3.3V
ITEM
SYMBOL CONDITION Min. Typ. Max. UNIT NOTE
Contrast Ratio
CR
600 900
-
-
2)
Response Time
Rise
Fall
ton
toff
- 8 20 ms 3)
- 6 20 ms 3)
Brightness of white
Bwh
350 (500)
- cd/m2
Brightness uniformity Buni
- - 30 4)
Color
Chromaticity
CIE
Red
Green
Blue
χ
χ
χ
0.62 0.65 0.68
θ=0°
0.30
0.33 0.36
1) 0.27 0.30 0.33
0.59 0.62 0.65
0.12 0.15 0.18
0.04 0.065 0.10
- Gray scale
=255
White
χ
0.243
0.245
0.273
0.275
0.303
0.305
Variation of Red
Color Position
(CIE)
Green
Blue
∆χ
θ+50°
∆χ φ90°
180°270°
∆χ 1)
-
-
-
-
-
-
- 0.04
- 0.04
5)
- 0.04
- 0.04 - Gray scale
- 0.04
=255
- 0.04
White
∆χ
- - 0.04
- - 0.04
Contrast Ratio at 89°
CR89
10 -
- - Estimated value
IPS Alpha Technology,Ltd.
Date
Mar. 29, 2007
Sheet
No.
STD2700-1
Page 5-1/2

5 Page





AX094F002F arduino
5.3 BLOCK DIAGRAM OF INTERFACE
TV set Side
RA0-RA7
GA0-GA7
BA0-BA7
TxIN
VSYNC
HSYNC
DE
DCLK
PLL
RB0-RB7
GB0-GB7
BB0-BB7
RSVD1)
RSVD1)
RSVD1)
DCLK
Host
Graphics
Controller
PLL
CN1
TFT-LCD Module Side
RxA 0+
RxA 0-
RxA 1+
RxA 1-
RxA 2+
RxA 2-
RxA 3+
RxA 3-
100
100
100
100
CLKA+
CLKA-
100
RxOUT
RA0-RA7
GA0-GA7
BA0-BA7
not connect
not connect
DE
PLL DCLK
RxB 0+
RxB 0-
RxB 1+
RxB 1-
RxB 2+
RxB 2-
RxB 3+
RxB 3-
100
100
100
100
CLKB+
CLKB-
100
PLL
Timing Converter
RB0-RB7
GB0-GB7
BB0-BB7
not connect
not connect
not connect
DCLK
RA0RA7, RB0RB7Pixel R Data
(7; MSB, 0; LSB)
GA0GA7, RB0~RB7:Pixel G Data
(7; MSB, 0; LSB)
BA0BA7,BB0~BB7:Pixel B Data
(7; MSB, 0; LSB)
DE Data Enable
Notes 1) The system must have the transmitter to drive the module.
2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line
when it is used differentially.
IPS Alpha Technology,Ltd.
Date
Mar. 29, 2007
Sheet
No.
STD2700-1
Page 8-3/7

11 Page







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