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PDF V370H3-PH3 Data sheet ( Hoja de datos )
| Número de pieza | V370H3-PH3 | |
| Descripción | TFT LCD Module | |
| Fabricantes | CHI MEI | |
| Logotipo |  |
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Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Oct. 26, 2009
Model No.: V370H3-PH3
Approval
TFT LCD Approval Specification
MODEL NO.:V370H3-PH3
Customer:
Approved by:
Note:
Approved By
TV Head Division
Chao-Chun Chung
Reviewed By
QA Dept.
Hsin-Nan Chen
Product Development Div.
WT Lin
LCD TV Marketing and Product Management Div.
Prepared By
Josh Chi
Chloe Chen
1
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com
1 page  
Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Nov. 16, 2009
Model No.: V370H3-PH3
Approval
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT (BASED ON CMO MODULE V370H3-LH1)
Item
Storage Temperature
Operating Ambient Temperature
Shock (Non-Operating)
Vibration (Non-Operating)
Symbol
TST
TOP
SNOP
VNOP
Value
Min. Max.
-20 +60
0 50
- 30
- 1.0
Unit Note
ºC (1)
ºC (1), (2)
G (3), (5)
G (4), (5)
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta Љ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of display
area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber. Thermal
management should be considered in final product design to prevent the surface temperature of display area
from being over 65 ºC. The range of operating temperature may degrade in case of improper thermal
management in final product design.
Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.
Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that the
module would not be twisted or bent by the fixture.
Relative Humidity (%RH)
100
90
80
60
Operating Range
40
20
10 Storage Range
-40 -20
0 20 40 60 80
Temperature (ºC)
5
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Global LCD Panel Exchange Center
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Issued Date: Nov. 16, 2009
Model No.: V370H3-PH3
Approval
37 CH3[4]-
38 CH3[4]+
39 GND
40 SCL
41 N.C.
42 N.C.
43 WP
44 SDA
45 LVDS_SEL
46 N.C.
47 N.C.
48 N.C.
49 N.C.
50 N.C.
51 N.C.
52 GND
53 CH4[4]+
54 CH4[4]-
55 CH4[3]+
56 CH4[3]-
57 GND
58 CH4CLK+
59 CH4CLK-
60 GND
61 CH4[2]+
62 CH4[2]-
63 CH4[1]+
64 CH4[1]-
65 CH4[0]+
66 CH4[0]-
67 GND
68 CH2[4]+
69 CH2[4]-
70 CH2[3]+
71 CH2[3]-
72 GND
73 CH2CLK+
74 CH2CLK-
75 GND
76 CH2[2]+
77 CH2[2]-
Third pixel Negative LVDS differential data input. Pair 4
Third pixel Positive LVDS differential data input. Pair 4
Ground
I2C Bus
No Connection
No Connection
Write Protection for EEPROM
I2C Bus
LVDS Data Format Selection
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
Ground
Fourth pixel Positive LVDS differential data input. Pair 4
Fourth pixel Negative LVDS differential data input. Pair 4
Fourth pixel Positive LVDS differential data input. Pair 3
Fourth pixel Negative LVDS differential data input. Pair 3
Ground
Fourth pixel Positive LVDS differential clock input.
Fourth pixel Negative LVDS differential clock input.
Ground
Fourth pixel Positive LVDS differential data input. Pair 2
Fourth pixel Negative LVDS differential data input. Pair 2
Fourth pixel Positive LVDS differential data input. Pair 1
Fourth pixel Negative LVDS differential data input. Pair 1
Fourth pixel Positive LVDS differential data input. Pair 0
Fourth pixel Negative LVDS differential data input. Pair 0
Ground
Second pixel Positive LVDS differential data input. Pair 4
Second pixel Negative LVDS differential data input. Pair 4
Second pixel Positive LVDS differential data input. Pair 3
Second pixel Negative LVDS differential data input. Pair 3
Ground
Second pixel Positive LVDS differential clock input.
Second pixel Negative LVDS differential clock input.
Ground
Second pixel Positive LVDS differential data input. Pair 2
Second pixel Negative LVDS differential data input. Pair 2
(1)
(1)
(2)
(1)
(1)
(1)
(1)
(1)
(1)
11
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