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PDF D2N05Z Data sheet ( Hoja de datos )
| Número de pieza | D2N05Z | |
| Descripción | TMOS Dual N-Channel | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MMDF2N05ZR2/D
™Designer's Data Sheet
Medium Power Surface Mount Products
TMOS Dual N-Channel with
Monolithic Zener ESD
Protected Gate
EZFETs™ are an advanced series of power MOSFETs which
utilize Motorola’s High Cell Density TMOS process and contain
monolithic back–to–back zener diodes. These zener diodes
provide protection against ESD and unexpected transients. These
miniature surface mount MOSFETs feature ultra low RDS(on) and
true logic level performance. They are capable of withstanding high
energy in the avalanche and commutation modes and the
drain–to–source diode has a very low reverse recovery time.
EZFET devices are designed for use in low voltage, high speed
switching applications where power efficiency is important. Typical
applications are dc–dc converters, and power management in
portable and battery powered products such as computers,
printers, cellular and cordless phones. They can also be used for
low voltage motor controls in mass storage products such as disk
drives and tape drives.
G
• Ultra Low RDS(on) Provides Higher Efficiency and Extends Battery Life
• Logic Level Gate Drive — Can Be Driven by Logic ICs
• Miniature SO–8 Surface Mount Package — Saves Board Space
• Diode Is Characterized for Use In Bridge Circuits
• Diode Exhibits High Speed, With Soft Recovery
• IDSS Specified at Elevated Temperature
• Mounting Information for SO–8 Package Provided
MMDF2N05ZR2
Motorola Preferred Device
DUAL TMOS
POWER MOSFET
2.0 AMPERES
50 VOLTS
RDS(on) = 0.300 OHM
™
D
CASE 751–05, Style 11
SO–8
S
Source–1
Gate–1
Source–2
Gate–2
18
27
36
45
Top View
Drain–1
Drain–1
Drain–2
Drain–2
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Drain–to–Source Voltage
Drain–to–Gate Voltage (RGS = 1.0 MΩ)
Gate–to–Source Voltage — Continuous
Drain Current — Continuous @ TA = 25°C
Drain Current — Continuous @ TA = 70°C
Drain Current — Single Pulse (tp ≤ 10 µs)
Total Power Dissipation @ TA = 25°C (1)
Operating and Storage Temperature Range
Thermal Resistance — Junction to Ambient
Maximum Temperature for Soldering Purposes
Symbol
VDSS
VDGR
VGS
ID
ID
IDM
PD
TJ, Tstg
RθJA
TL
Value
50
50
± 15
2.0
1.7
8.0
2.0
– 55 to 150
62.5
260
Unit
Vdc
Vdc
Vdc
Adc
Apk
Watts
°C
°C/W
°C
DEVICE MARKING
D2N05Z
ORDERING INFORMATION
Device
Reel Size
Tape Width
Quantity
MMDF2N05ZR2
13″
12 mm embossed tape
2500 units
(1) When mounted on G10/FR–4 glass epoxy board using minimum recommended footprint.
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
Preferred devices are Motorola recommended choices for future use and best overall value.
Designer’s, HDTMOS and EZFET are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc. Thermal Clad is a trade-
mark of the Bergquist Company.
REV 1
©MMoottoororolal,aInTc.M19O9S7 Power MOSFET Transistor Device Data
1
1 page  
12
QT
40
VGS
9 30
6 20
Q1 Q2
3
Q3 VDS
0
0 0.5 1 1.5 2 2.5 3
Qg, TOTAL GATE CHARGE (nC)
10
ID = 1.3 A
TJ = 25°C
0
3.5 4
Figure 8. Gate–To–Source and Drain–To–Source
Voltage versus Total Charge
1000
VGS = 10 V
TJ = 25°C
MMDF2N05ZR2
td(off)
100
tf
tr
td(on)
10
1 10 100
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
DRAIN–TO–SOURCE DIODE CHARACTERISTICS
The switching characteristics of a MOSFET body diode
are very important in systems using it as a freewheeling or
commutating diode. Of particular interest are the reverse re-
covery characteristics which play a major role in determining
switching losses, radiated noise, EMI and RFI.
System switching losses are largely due to the nature of
the body diode itself. The body diode is a minority carrier de-
vice, therefore it has a finite reverse recovery time, trr, due to
the storage of minority carrier charge, QRR, as shown in the
typical reverse recovery wave form of Figure 11. It is this
stored charge that, when cleared from the diode, passes
through a potential and defines an energy loss. Obviously,
repeatedly forcing the diode through reverse recovery further
increases switching losses. Therefore, one would like a
diode with short trr and low QRR specifications to minimize
these losses.
The abruptness of diode reverse recovery effects the
amount of radiated noise, voltage spikes, and current ring-
ing. The mechanisms at work are finite irremovable circuit
parasitic inductances and capacitances acted upon by high
di/dts. The diode’s negative di/dt during ta is directly con-
trolled by the device clearing the stored charge. However,
the positive di/dt during tb is an uncontrollable diode charac-
teristic and is usually the culprit that induces current ringing.
Therefore, when comparing diodes, the ratio of tb/ta serves
as a good indicator of recovery abruptness and thus gives a
comparative estimate of probable noise generated. A ratio of
1 is considered ideal and values less than 0.5 are considered
snappy.
Compared to Motorola standard cell density low voltage
MOSFETs, high cell density MOSFET diodes are faster
(shorter trr), have less stored charge and a softer reverse re-
covery characteristic. The softness advantage of the high
cell density diode means they can be forced through reverse
recovery at a higher di/dt than a standard cell MOSFET
diode without increasing the current ringing or the noise gen-
erated. In addition, power dissipation incurred from switching
the diode will be less due to the shorter recovery time and
lower switching losses.
2
1.75
VGS = 0 V
TJ = 25°C
1.5
1.25
1
0.75
0.5
0.25
0
0.5 0.55 0.6 0.65 0.7 0.75 0.8
VSD, SOURCE–TO–DRAIN VOLTAGE (VOLTS)
0.85
Figure 10. Diode Forward Voltage versus Current
Motorola TMOS Power MOSFET Transistor Device Data
5
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