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PDF RTL8211BG-GR Data sheet ( Hoja de datos )

Número de pieza RTL8211BG-GR
Descripción INTEGRATED 10/100/1000 GIGABIT ETHERNET TRANSCEIVER
Fabricantes Realtek Microelectronics　
Logotipo Realtek Microelectronics Logotipo



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No Preview Available ! RTL8211BG-GR Hoja de datos, Descripción, Manual

RTL8211BG-GR
INTEGRATED 10/100/1000 GIGABIT
ETHERNET TRANSCEIVER
DATASHEET
Rev. 1.2
18 July 2007
Track ID: JATR-1076-21
Realtek Semiconductor Corp.
No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
Tel.: +886-3-578-0211. Fax: +886-3-577-6047
www.realtek.com.tw

1 page




RTL8211BG-GR pdf
RTL8211BG
Datasheet
List of Tables
TABLE 1. TRANSCEIVER INTERFACE ...........................................................................................................................3
TABLE 2. CLOCK .........................................................................................................................................................3
TABLE 3. RGMII/GMII/MII........................................................................................................................................4
TABLE 4. MANAGEMENT INTERFACE..........................................................................................................................5
TABLE 5. RESET ..........................................................................................................................................................5
TABLE 6. MODE SELECTION........................................................................................................................................5
TABLE 7. LED INDICATION.........................................................................................................................................5
TABLE 8. REGULATOR & REFERENCE.........................................................................................................................6
TABLE 9. POWER & GROUND......................................................................................................................................6
TABLE 10. NOT CONNECTED ........................................................................................................................................6
TABLE 11. CONFIG[9:0] PINS VS. CONFIGURATION REGISTER...................................................................................8
TABLE 12. CONFIGURATION REGISTER DEFINITION.....................................................................................................9
TABLE 13. TYPICAL MDIO FRAME FORMAT..............................................................................................................11
TABLE 14. 1000BASE-T BASE AND NEXT PAGES BIT ASSIGNMENTS ........................................................................13
TABLE 15. LED CONFIGURATION...............................................................................................................................18
TABLE 16. REGISTER MAPPING AND DEFINITIONS.....................................................................................................20
TABLE 17. BMCR (BASIC MODE CONTROL REGISTER, ADDRESS 0X00) ..................................................................21
TABLE 18. BMSR (BASIC MODE STATUS REGISTER) ADDRESS 0X01 .......................................................................22
TABLE 19. PHYID1 (PHY IDENTIFIER REGISTER 1, ADDRESS 0X02)........................................................................23
TABLE 20. PHYID2 (PHY IDENTIFIER REGISTER 2, ADDRESS 0X03)........................................................................24
TABLE 21. ANAR (AUTO-NEGOTIATION ADVERTISING REGISTER, ADDRESS 0X04)................................................24
TABLE 22. ANLPAR (AUTO-NEGOTIATION LINK PARTNER ABILITY REGISTER, ADDRESS 0X05)...........................25
TABLE 23. ANER (AUTO-NEGOTIATION EXPANSION REGISTER, ADDRESS 0X06)....................................................25
TABLE 24. ANNPTR (AUTO-NEGOTIATION NEXT PAGE TRANSMIT REGISTER, ADDRESS 0X07) ............................26
TABLE 25. ANNPRR (AUTO-NEGOTIATION NEXT PAGE RECEIVE REGISTER, ADDRESS 0X08) ...............................26
TABLE 26. GBCR (1000BASE-T CONTROL REGISTER, ADDRESS 0X09)....................................................................27
TABLE 27. GBSR (1000BASE-T STATUS REGISTER, ADDRESS 0X0A) ......................................................................27
TABLE 28. GBESR (1000BASE-T EXTENDED STATUS REGISTER, ADDRESS 0X0F) ..................................................28
TABLE 29. PHYCR (PHY SPECIFIC CONTROL REGISTER, ADDRESS 0X10)...............................................................28
TABLE 30. PHYSR (PHY SPECIFIC STATUS REGISTER, ADDRESS 0X11) ..................................................................29
TABLE 31. INER (INTERRUPT ENABLE REGISTER, ADDRESS 0X12) ..........................................................................30
TABLE 32. INSR (INTERRUPT STATUS REGISTER, ADDRESS 0X13) ...........................................................................31
TABLE 33. EPHYCR (EXTENDED PHY SPECIFIC CONTROL REGISTER, ADDRESS 0X14)..........................................31
TABLE 34. RXERC (RECEIVE ERROR COUNTER, ADDRESS 0X15) ............................................................................32
TABLE 35. LEDCR (LED CONTROL REGISTER, ADDRESS 0X18) ..............................................................................32
TABLE 36. ABSOLUTE MAXIMUM RATINGS ...............................................................................................................34
TABLE 37. RECOMMENDED OPERATING CONDITIONS ...............................................................................................34
TABLE 38. CRYSTAL REQUIREMENTS.........................................................................................................................34
TABLE 39. DC CHARACTERISTICS ..............................................................................................................................35
TABLE 40. MII TRANSMIT TIMING PARAMETERS.......................................................................................................36
TABLE 41. MII RECEIVE TIMING PARAMETERS .........................................................................................................36
TABLE 42. MII MANAGEMENT TIMING PARAMETERS ...............................................................................................37
TABLE 43. RGMII TIMING PARAMETERS ...................................................................................................................39
TABLE 44. GMII TIMING PARAMETERS......................................................................................................................40
TABLE 45. ORDERING INFORMATION .........................................................................................................................43
Integrated 10/100/1000 Gigabit Ethernet Transceiver v
Track ID: JATR-1076-21 Rev. 1.2

5 Page





RTL8211BG-GR arduino
5.4. Management Interface
Pin No.
40
41
60
Pin Name
MDC
MDIO
INTB
Type
I
I/O
O
Table 4. Management Interface
Description
Management Data Clock.
Input/Output of Management Data.
Interrupt. Active low.
RTL8211BG
Datasheet
5.5. Reset
Pin No.
61
Pin Name
PHYRSTB
Type
I
Table 5. Reset
Description
Hardware Reset. Active low.
5.6. Mode Selection
Table 6. Mode Selection
Pin No.
Pin Name
Type Description
85 CONFIG[0] I PHY Configuration.
84 CONFIG[1] I
83 CONFIG[2] I
81 CONFIG[3] I
80 CONFIG[4] I
71 CONFIG[5] I
70 CONFIG[6] I
60 CONFIG[7] I
50 CONFIG[8] I
45 CONFIG[9] I
Note: See section 6.3 Hardware Configuration, page 8, for details.
5.7. LED Indication
Table 7. LED Indication
Pin No.
Pin Name
Type Description
76
LED_LINK10
O LED 1, 10Mbps Link Indicator.
73
LED_LINK100
O LED 2, 100Mbps Link Indicator.
67 LED_LINK1000 O LED 3, 1000Mbps Link Indicator.
66
LED_DUPLEX
O Duplex LED.
63
LED_RX
O Receive LED.
62
LED_TX
O Transmit LED.
Note: See section 7.3.9 LEDCR (LED Control Register, Address 0x18), page 32, for details.
Integrated 10/100/1000 Gigabit Ethernet Transceiver 5
Track ID: JATR-1076-21 Rev. 1.2

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