ADM7170 Datasheet PDF - Analog Devices
Part Number | ADM7170 | |
Description | Fast Transient Response CMOS LDO | |
Manufacturers | Analog Devices | |
Logo | ||
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6.5 V, 500 mA, Ultralow Noise, High PSRR,
Fast Transient Response CMOS LDO
ADM7170
FEATURES
Input voltage range: 2.3 V to 6.5 V
Maximum load current: 500 mA
Low noise: 5 µV rms independent of output voltage at
100 Hz to 100 kHz
Fast transient response: 1.5 μs for 1 mA to 500 mA load step
60 dB PSRR at 100 kHz
Low dropout voltage: 42 mV at 500 mA load, VOUT = 3 V
Initial accuracy: ±0.75%
Accuracy over line, load, and temperature: ±1.25%
Quiescent current, IGND = 0.7 mA at no load
Low shutdown current: 0.25 μA at VIN = 5 V
Stable with small 4.7 µF ceramic output capacitor
Adjustable and fixed output voltage options: 1.2 V to 5.0 V
Adjustable output from 1.2 V to VIN − VDO
Precision enable
Adjustable soft start
8-lead, 3 mm × 3 mm LFCSP package
Supported by ADIsimPower tool
APPLICATIONS
Regulation to noise sensitive applications: ADC and DAC
circuits, precision amplifiers, PLLs/VCOs, and clocking ICs
Communications and infrastructure
Medical and healthcare
Industrial and instrumentation
GENERAL DESCRIPTION
The ADM7170 is a CMOS, low dropout linear regulator (LDO)
that operates from 2.3 V to 6.5 V and provides up to 500 mA of
output current. This high output current LDO is ideal for regula-
tion of high performance analog and mixed signal circuits
operating from 6 V down to 1.2 V rails. Using an advanced
proprietary architecture, the device provides high power supply
rejection and low noise, and achieves excellent line and load
transient response with just a small 4.7 µF ceramic output
capacitor. Load transient response is typically 1.5 μs for a 1 mA
to 500 mA load step.
The ADM7170 is available in 17 fixed output voltage options.
The following voltages are available from stock: 1.3 V, 1.8 V,
2.5 V, 3.0 V, 3.3 V, 4.2 V, and 5.0 V. Additional voltages that are
available by special order are: 1.5 V, 1.85 V, 2.0 V, 2.2 V, 2.7 V,
2.75 V, 2.8 V, 2.85 V, 3.8 V, and 4.6 V. An adjustable version is
also available that allows output voltages that range from 1.2 V
to VIN − VDO with an external feedback divider.
Rev. A
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TYPICAL APPLICATION CIRCUIT
VIN = 5V
CIN
4.7µF
ON
OFF
ADM7170
VIN VOUT
VIN VOUT
SENSE
EN SS
GND
VOUT = 3.3V
COUT
4.7µF
CSS
1nF
Figure 1. ADM7170 with Fixed Output Voltage, 3.3 V
Inrush current can be controlled by adjusting the start-up time
via the soft start pin. The typical start-up time with a 1 nF soft
start capacitor is about 1.0 ms.
The ADM7170 regulator output noise is 5 μV rms independent
of the output voltage. The ADM7170 is available in an 8-lead,
3 mm × 3 mm LFCSP, making it not only a very compact
solution, but also providing excellent thermal performance for
applications requiring up to 500 mA of output current in a
small, low profile footprint.
Figure 2. Transient Response (Trace 2), 1 mA to 500 mA Load Step in 400 ns
(Trace 1)
Table 1. Related Devices
Device Input Voltage
ADM7171 2.3 V to 6.5 V
ADM7172 2.3 V to 6.5 V
Output Current
1A
2A
Package
8-lead LFCSP
8-lead LFCSP
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2014 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
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Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
VIN to GND
VOUT to GND
EN to GND
SS to GND
SENSE to GND
Storage Temperature Range
Operating Junction Temperature Range
Soldering Conditions
Rating
−0.3 V to +7 V
−0.3 V to VIN
−0.3 V to +7 V
−0.3 V to VIN
−0.3 V to +7 V
−65°C to +150°C
−40°C to +125°C
JEDEC J-STD-020
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination. The ADM7170 can be damaged when the
junction temperature limits are exceeded. Monitoring ambient
temperature does not guarantee that TJ is within the specified
temperature limits. In applications with high power dissipation
and poor thermal resistance, the maximum ambient
temperature may need to be derated.
In applications with moderate power dissipation and low
printed circuit board (PCB) thermal resistance, the maximum
ambient temperature can exceed the maximum limit provided
that the junction temperature is within specification limits. The
junction temperature (TJ) of the device is dependent on the
ambient temperature (TA), the power dissipation of the device
(PD), and the junction-to-ambient thermal resistance of the
package (θJA).
Maximum junction temperature (TJ) is calculated from the
ambient temperature (TA) and power dissipation (PD) using the
formula
TJ = TA + (PD × θJA)
Junction-to-ambient thermal resistance (θJA) of the package is
based on modeling and calculation using a 4-layer board. The
junction-to-ambient thermal resistance is highly dependent on
the application and board layout. In applications where high
ADM7170
maximum power dissipation exists, close attention to thermal
board design is required. The value of θJA may vary, depending on
PCB material, layout, and environmental conditions. The
specified values of θJA are based on a 4-layer, 4 in. × 3 in. circuit
board. See JESD51-7 and JESD51-9 for detailed information on
the board construction. For additional information, see the
AN-617 Application Note, Wafer Level Chip Scale Package,
available at www.analog.com.
ΨJB is the junction-to-board thermal characterization parameter
with units of °C/W. ΨJB of the package is based on modeling and
calculation using a 4-layer board. The JESD51-12, Guidelines for
Reporting and Using Electronic Package Thermal Information,
states that thermal characterization parameters are not the same
as thermal resistances. ΨJB measures the component power
flowing through multiple thermal paths rather than a single
path as in thermal resistance, θJB. Therefore, ΨJB thermal paths
include convection from the top of the package as well as
radiation from the package, factors that make ΨJB more useful
in real-world applications. Maximum junction temperature (TJ)
is calculated from the board temperature (TB) and power
dissipation (PD) using the formula
TJ = TB + (PD × ΨJB)
See JESD51-8 and JESD51-12 for more detailed information
about ΨJB.
THERMAL RESISTANCE
θJA, θJC, and ΨJB are specified for the worst-case conditions, that
is, a device soldered in a circuit board for surface-mount
packages.
Table 5. Thermal Resistance
Package Type
θJA θJC ΨJB Unit
8-Lead LFCSP
36.4 23.5 13.3 °C/W
ESD CAUTION
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