MCP6N11 Datasheet PDF - Microchip
| Part Number | MCP6N11 | |
| Description | Instrumentation Amplifier | |
| Manufacturers | Microchip | |
| Logo |  |
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MCP6N11
500 kHz, 800 µA Instrumentation Amplifier
Features
• Rail-to-Rail Input and Output
• Gain Set by 2 External Resistors
• Minimum Gain (GMIN) Options:
1, 2, 5, 10 or 100 V/V
• Common Mode Rejection Ratio (CMRR): 115 dB
(typical, GMIN = 100)
• Power Supply Rejection Ratio (PSRR): 112 dB
(typical, GMIN = 100)
• Bandwidth: 500 kHz (typical, Gain = GMIN)
• Supply Current: 800 μA/channel (typical)
• Single Channel
• Enable/VOS Calibration pin: (EN/CAL)
• Power Supply: 1.8V to 5.5V
• Extended Temperature Range: -40°C to +125°C
Typical Applications
• High Side Current Sensor
• Wheatstone Bridge Sensors
• Difference Amplifier with Level Shifting
• Power Control Loops
Design Aids
• Microchip Advanced Part Selector (MAPS)
• Demonstration Board
• Application Notes
Block Diagram
VOUT
RF
RG
VREF
VIP
VIM
VOUT
VFG
RM4
I4
VDD VSS
VREF
VIP
VIM
GM2
GM1
I2 Σ
I1
I3
GM3
VTR
POR
Low Power
VOS Calibration
EN/CAL
Description
Microchip Technology Inc. offers the single MCP6N11
instrumentation amplifier (INA) with Enable/VOS Cali-
bration pin (EN/CAL) and several minimum gain
options. It is optimized for single-supply operation with
rail-to-rail input (no common mode crossover distor-
tion) and output performance.
Two external resistors set the gain, minimizing gain
error and drift-over temperature. The reference voltage
(VREF) shifts the output voltage (VOUT).
The supply voltage range (1.8V to 5.5V) is low enough
to support many portable applications. All devices are
fully specified from -40°C to +125°C.
These parts have five minimum gain options (1, 2, 5, 10
and 100 V/V). This allows the user to optimize the input
offset voltage and input noise for different applications.
Typical Application Circuit
VDD
10 Ω
IDD
U1
MCP6N11
RF
VFG 200 kΩ
VBAT
+1.8V
to
+5.5V
VOUT
RG
10 kΩ
VREF
Package Types
MCP6N11
SOIC
MCP6N11
2×3 TDFN *
VFG 1
VIM 2
VIP 3
VSS 4
8 EN/CAL VFG 1
8 EN/CAL
7 VDD
6 VOUT
5 VREF
VIM 2 EP 7 VDD
VIP 3 9 6 VOUT
VSS 4
5 VREF
* Includes Exposed Thermal Pad (EP); see Table 3-1.
© 2011 Microchip Technology Inc.
DS25073A-page 1
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MCP6N11
TABLE 1-1: DC ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = 1.8V to 5.5V, VSS = GND, EN/CAL = VDD,
VCM = VDD/2, VDM = 0V, VREF = VDD/2, VL = VDD/2, RL = 10 kΩ to VL and GDM = GMIN; see Figure 1-6 and Figure 1-7.
Parameters
Sym Min Typ Max Units GMIN
Conditions
Input Differential Mode Voltage (VDM) (Note 4)
Differential Input
Voltage Range
VDML
VDMH
-2.7/GMIN
—
— —V
— +2.7/GMIN V
all VREF = (VDD – GDMVDM)/2
(Note 6)
Differential Gain Error
gE
-1 ±0.13 +1 %
VDM = VDML to VDMH,
Differential Gain Drift ΔgE/ΔTA — ±0.0006 — %/°C
VREF = (VDD – GDMVDM)/2
Differential
Non-Linearity
INLDM
-500
-800
±30
+500 ppm
1 (Note 7)
±40 +800 ppm 2, 5
-2000
±100
+2000 ppm 10, 100
DC Open-Loop Gain
AOL
61
84
— dB 1 VDD = 1.8V,
68 90 — dB 2 VOUT = 0.2V to 1.6V
76 98 — dB 5
78 104 — dB 10
86 116 — dB 100
70 94 — dB 1 VDD = 5.5V,
77 100 — dB 2 VOUT = 0.2V to 5.3V
84 108 — dB 5
90 114 — dB 10
97 125 — dB 100
Output
Minimum Output
Voltage Swing
Maximum Output
Voltage Swing
Output Short Circuit
Current
Power Supply
VOL
VOH
ISC
—
—
VDD − 15
VDD − 25
—
—
— VSS + 15 mV
— VSS + 25 mV
— — mV
— — mV
±8 — mA
±30 — mA
all VDM = -VDD/(2GDM),
VDD = 1.8V,
VREF = VDD/2 – 1V
VDM = -VDD/(2GDM),
VDD = 5.5V,
VREF = VDD/2 – 1V
VDM = VDD/(2GDM),
VDD = 1.8V,
VREF = VDD/2 + 1V
VDM = VDD/(2GDM),
VDD = 5.5V,
VREF = VDD/2 + 1V
VDD = 1.8V
VDD = 5.5V
Supply Voltage
VDD
1.8
—
5.5 V all
Quiescent Current IQ 0.5 0.8 1.1 mA
per Amplifier
IO = 0
POR Trip Voltage
VPRL
1.1
1.4
—V
VPRH
—
1.4 1.7 V
Note
1:
2:
3:
4:
5:
6:
7:
VCM = (VIP + VIM) / 2, VDM = (VIP – VIM) and GDM = 1 + RF/RG.
The VOS spec limits include 1/f noise effects.
This is the input offset drift without VOS re-calibration; toggle EN/CAL to minimize this effect.
These specs apply to both the VIP, VIM input pair (use VCM) and to the VREF, VFG input pair (VREF takes VCM’s place).
This spec applies to the VIP, VIM, VREF and VFG pins individually.
Figure 2-11 and Figure 2-19 show the VIVR and VDMR variation over temperature.
See Section 1.5 “Explanation of DC Error Specs”.
© 2011 Microchip Technology Inc.
DS25073A-page 5
Preview 5 Page |
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| Information | Total 30 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ MCP6N11.PDF Datasheet ] | |
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