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PDF ADM7154 Data sheet ( Hoja de datos )
| Número de pieza | ADM7154 | |
| Descripción | RF Linear Regulator | |
| Fabricantes | Analog Devices | |
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Preliminary Technical Data
600 mA, Ultralow Noise,
High PSRR, RF Linear Regulator
ADM7154
FEATURES
Input voltage range: 2.3 V to 5.5 V
Maximum load current: 600 mA
Low noise
0.9 μV rms total integrated noise from 100 Hz to 100 kHz
1.6 μV rms total integrated noise from 10 Hz to 100 kHz
Noise spectral density: 1.5 nV√Hz from 10 kHz to 1 MHz
PSRR of 90 dB from 200 Hz to 200 kHz; 58 dB at 1 MHz,
VOUT = 3.3 V, VIN = 3.8 V
Dropout voltage: 120 mV typical at VOUT = 3.3 V, IOUT = 600 mA
Initial accuracy: ±0.5%
Accuracy over line, load, and temperature: −2.0% (minimum),
+1.5% (maximum)
Quiescent current, IGND = 4 mA at no load
Low shutdown current: 0.2 μA
Stable with a 10 μF ceramic output capacitor
Adjustable and fixed output voltage options: 1.2 V, 1.8 V, 2.5 V,
2.8 V, 3.0 V, 3.3 V (16 standard voltages between 1.2 V and
3.3 V available)
8-lead LFCSP and 8-lead SOIC packages
Precision enable
Supported by ADIsimPower tool
APPLICATIONS
Regulation to noise sensitive applications: PLLs, VCOs, and
PLLs with integrated VCOs
Communications and infrastructure
Backhaul and microwave links
GENERAL DESCRIPTION
The ADM7154 is a linear regulator that operates from 2.3 V to
5.5 V and provides up to 600 mA of output current. Using an
advanced proprietary architecture, it provides high power
supply rejection and ultralow noise, achieving excellent line and
load transient response with only a 10 μF ceramic output capacitor.
There are 16 standard output voltages for the ADM7154. The
following voltages are available in stock: 1.2 V, 1.8 V, 2.5 V, 2.8 V,
3.0 V, and 3.3 V. Additional voltages are available by special
order: 1.3 V, 1.5 V, 1.6 V, 2.0 V, 2.2 V, 2.6 V, 2.7 V, 2.9 V, 3.1 V,
and 3.2 V.
The ADM7154 regulator typical output noise is 0.9 μV rms from
100 Hz to 100 kHz for fixed output voltage options and 1.5 nV/√Hz
for noise spectral density from 10 kHz to 1 MHz. The ADM7154 is
available in an 8-lead, 3 mm × 3 mm LFCSP and 8-lead SOIC
packages, making it not only a very compact solution, but also
providing excellent thermal performance for applications requiring
up to 600 mA of output current in a small, low profile footprint.
Rev. PrE
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
TYPICAL APPLICATION CIRCUIT
VIN = 3.8V
CIN
10µF
ON
OFF
CBYP
1µF
CREG
10µF
ADM7154
VIN VOUT
VOUT = 3.3V
COUT
10µF
EN REF
BYP REF_SENSE
CREF
1µF
VREG
GND
Figure 1. Regulated 3.3 V Output from 3.8 V Input
10k
NOISE FLOOR
1.0µF
3.3µF
1k 10µF
33µF
100µF
330µF
100 1000µF
10
1
0.1
0.1 1 10 100 1k 10k 100k 1M
FREQUENCY (Hz)
Figure 2. Noise Spectral Density for Different Values of CBYP
Table 1. Related Devices
Model
Input
Voltage
ADM7150ACP 4.5 V to 16 V
ADM7150ARD 4.5 V to 16 V
ADM7151ACP 4.5 V to 16 V
ADM7151ARD 4.5 V to 16 V
ADM7155ACP 2.3 V to 5.5 V
ADM7155ARD 2.3 V to 5.5 V
Output
Current
800 mA
800 mA
800 mA
800 mA
600 mA
600 mA
Fixed/
Adj
Fixed
Fixed
Adj
Adj
Adj
Adj
Package
8-Lead LFCSP
8-Lead SOIC
8-Lead LFCSP
8-Lead SOIC
8-Lead LFCSP
8-Lead SOIC
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2014 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
Preliminary Technical Data
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
VIN to GND
VREG to GND
VOUT to GND
BYP to VOUT
EN to GND
BYP to GND
REF to GND
REF_SENSE to GND
Storage Temperature Range
Junction Temperature
Operating Ambient Temperature
Range
Soldering Conditions
Rating
−0.3 V to +7 V
−0.3 V to VIN, or +4 V
(whichever is less)
−0.3 V to VREG, or +4 V
(whichever is less)
±0.3 V
−0.3 V to +7 V
−0.3 V to VREG, or +4 V
(whichever is less)
−0.3 V to VREG, or +4 V
(whichever is less)
−0.3 V to +4 V
−65°C to +150°C
150°C
−40°C to +125°C
JEDEC J-STD-020
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination. The ADM7154 can be damaged when the
junction temperature limits are exceeded. Monitoring ambient
temperature does not guarantee that TJ is within the specified
temperature limits. In applications with high power dissipation
and poor thermal resistance, the maximum ambient temper-
ature may need to be derated.
In applications with moderate power dissipation and low
printed circuit board (PCB) thermal resistance, the maximum
ambient temperature can exceed the maximum limit provided
that the junction temperature is within specification limits. The
junction temperature (TJ) of the device is dependent on the
ambient temperature (TA), the power dissipation of the device
(PD), and the junction-to-ambient thermal resistance of the
package (θJA).
Maximum junction temperature (TJ) is calculated from the
ambient temperature (TA) and power dissipation (PD) using the
following formula:
TJ = TA + (PD × θJA)
ADM7154
Junction-to-ambient thermal resistance (θJA) of the package is
based on modeling and calculation using a 4-layer board. The
junction-to-ambient thermal resistance is highly dependent on
the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The value of θJA may vary, depending
on PCB material, layout, and environmental conditions. The
specified values of θJA are based on a 4-layer, 4 in. × 3 in. circuit
board. See JESD51-7 and JESD51-9 for detailed information on
the board construction.
ΨJB is the junction-to-board thermal characterization parameter
with units of °C/W. ΨJB of the package is based on modeling and
calculation using a 4-layer board. JESD51-12, Guidelines for
Reporting and Using Electronic Package Thermal Information,
states that thermal characterization parameters are not the same
as thermal resistances. ΨJB measures the component power
flowing through multiple thermal paths rather than a single
path as in thermal resistance, θJB. Therefore, ΨJB thermal paths
include convection from the top of the package as well as
radiation from the package, factors that make ΨJB more useful
in real-world applications. Maximum junction temperature (TJ)
is calculated from the board temperature (TB) and power
dissipation (PD) using the formula
TJ = TB + (PD × ΨJB)
See JESD51-8 and JESD51-12 for more detailed information
about ΨJB.
THERMAL RESISTANCE
θJA, θJC, and ΨJB are specified for the worst case conditions, that
is, a device soldered in a circuit board for surface-mount
packages.
Table 5. Thermal Resistance
Package Type
θJA θJC ΨJB Unit
8-Lead LFCSP
36.7 23.5 13.3 °C/W
8-Lead SOIC
36.9 27.1 18.6 °C/W
ESD CAUTION
Rev. PrE | Page 5 of 23
5 Page 
Preliminary Technical Data
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
1.0
1k
10Hz TO 100kHz
100Hz TO 100kHz
1.5 2.0 2.5 3.0
OUTPUT VOLTAGE (V)
Figure 29. RMS Noise vs. Output Voltage
3.5
100
10
1
0.1
10
10k
100 1k 10k 100k 1M
FREQUENCY (Hz)
Figure 30. Output Noise Spectral Density,
10 Hz to 10 MHz, ILOAD = 100 mA
10M
1k
100
10
1
0.1
0.1
1 10 100 1k 10k 100k
FREQUENCY (Hz)
Figure 31. Output Noise Spectral Density,
0.1 Hz to 1 MHz, ILOAD = 10 mA
1M
ADM7154
10k
1k
100
10
1
0.1
0.1
1
10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
Figure 32. Output Noise Spectral Density, 0.1 Hz to 10 MHz, ILOAD = 100 mA
10k
ILOAD = 10mA
ILOAD = 100mA
ILOAD = 200mA
1k ILOAD = 400mA
ILOAD = 600mA
100
10
1
0.1
0.1 1 10 100 1k 10k 100k 1M
FREQUENCY (Hz)
Figure 33. Output Noise Spectral Density at Various Loads,
01 Hz to 1 MHz
1k
IILLOOAADD
=
=
10mA
100mA
IILLOOAADD
=
=
200mA
400mA
100 ILOAD = 600mA
10
1
0.1
10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
Figure 34. Output Noise Spectral Density at Various Loads,
10 Hz to 10 MHz
Rev. PrE | Page 11 of 23
11 Page | ||
| Páginas | Total 23 Páginas | |
| PDF Descargar | [ Datasheet ADM7154.PDF ] | |
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