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PDF SH69P48 Data sheet ( Hoja de datos )
| Número de pieza | SH69P48 | |
| Descripción | OTP 4K 4-bit Micro-controller | |
| Fabricantes | Sino Wealth | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de SH69P48 (archivo pdf) en la parte inferior de esta página. Total 41 Páginas | ||
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SH69P48
Preliminary
OTP 4-bit Microcontroller with SAR 10-bit A/D Converter
Features
SH6610D-based single-chip 4-bit microcontroller with
10-bit SAR A/D converter
OTP ROM: 4K X 16 bits
RAM: 253 X 4 bits
- System register: 61 X 4 bits
- Data memory: 192 X 4 bits
Operation voltage:
- fOSC=30kHz - 4MHz, VDD=2.4V - 5.5V
- fOSC=4MHz - 10MHz, VDD=4.5V - 5.5V
17 CMOS bi-directional I/O pins (exclude 1 output only
pin)
Built in pull-up for I/O port
Two 8-bit auto re-load timer/counter, One can switch to
external clock source
Read Rom Table function
8-level subroutine nesting (including interrupts)
Powerful interrupt sources:
- A/D interrupt
- Internal interrupt (Timer1, Timer0)
- External interrupts: Port B/D (Falling edge)
Oscillator: (OTP option)
- Crystal oscillator: 32768Hz, 400kHz ~ 10MHz
- Ceramic resonator: 400k ~ 10MHz
- External ROSC RC oscillator: 400k ~ 10MHz
- Internal ROSC RC oscillator: 4MHz
- External clock: 30k ~ 10MHz
Instruction cycle time:
- 4/32.768kHz (≈122µs) for 32.768kHz
- 4/10MHz (= 0.4µs) for 10MHz at VDD=5.0V
10 channels 10-bit resolution A/D converter
2 channels 8+2bit PWM output
Warm-up timer for power on reset
Low voltage reset function (LVR)
Internal reliable reset circuit
Built-in watchdog timer
Two low power operation modes: HALT and STOP
OTP type/Code protection
20-pin DIP/SOP package
General Description
The SH69P48 is an advanced CMOS 4-bit microcontroller. It provide the following standard features: 4K words of OTP ROM,
253 nibbles of RAM, 8-bit timer/counter, 10-bit A/D converter, 8+2bit high speed PWM output, on-chip oscillator clock circuitry,
on-chip watchdog timer, low voltage reset function and support power saving modes to reduce power consumption.
1/41 V0.0
1 page  
OTP Programming Pin Description (OTP program mode)
SH69P48
Pin No.
15
Symbol
VDD
I/O Shared by
Description
P VDD Programming Power supply (+5.5V)
5
VPP
P
RESET
Programming high voltage Power supply (+11V)
/PORTE.1
6
GND
P
GND
Ground
OSCI
16
SCK
I
Programming Clock input pin
/PORTE.0
PORTA.0
7
SDA
I/O
Programming Data pin
AN0
2. SH69P48/16pin
Pin No.
Designation
PORTD.2
1
/T1
2
3
4
5
6
7,8
9,10
11
12
13
14
PORTD.3
/PWM1
PORTC.2
/PWM0
PORTC.3
/T0
RESET
/PORTE.1
GND
PORTA.0 ~ 1
/AN0 ~ 1
PORTB.2 ~ 3
/AN6 ~ 7
VDD
OSCI
/PORTE.0
OSCO
/PORTC.0
PORTC.1
/VREF
I/O Description
I/O Bit programmable Bi-directional I/O port
I Shared with Timer1 Input Capture
I Vector port interrupt. (falling edge active)
I/O Bit programmable Bi-directional I/O port
O Shared with PWM1 output
I Vector port interrupt. (falling edge active)
I/O Bit programmable Bi-directional I/O port
O Shared with PWM0 output
I/O Bit programmable Bi-directional I/O port
I Shared with Timer0 external clock input
I Reset pin input, (low active)
O Output only (open drain type) (selected by code option)
P Ground pin
I/O Bit programmable bi-directional I/O port
I Shared with ADC input channel AN0 ~ AN1
I/O Bit programmable bi-directional I/O port
I Shared with ADC input channel AN6 ~ AN7
I Vector port interrupt. (falling edge active)
P Power supply pin
I
Oscillator input pin, connect to crystal/ceramic oscillator or external
resistor of external RC oscillator.
I/O Shared with bi-directional I/O port in the internal RC code option
O Oscillator output pin, connect to crystal/ceramic oscillator.
I/O Shared with bi-directional I/O port in the RC oscillator code option
I/O Bit programmable Bi-directional I/O port
I Shared with external ADC VREF input
5/41 V0.0
5 Page 
Bit 3
Bit 2
Bit 1
Bit 0
$21 PWM1S T1CK1
T1CK0 PWM1_EN
$22
$23
$24
$25
$26
$27
$28
$29
$2A
$2B
$2C
$2D
$2E
$2F
$380
$381
$382
$383
$384
$385
$386
$387
$388
$389
$38A
$38B
$38C
PP0.3
PP0.7
-
PD0.3
PD0.7
PP1.3
PP1.7
-
PD1.3
PD1.7
-
-
A5
A9
RDT.3
RDT.7
RDT.11
RDT.15
PDIEN.3
PDIF.3
PBIEN.3
PBIF.3
PPACR.3
PPBCR.3
PPCCR.3
PPDCR.3
-
PP0.2
PP0.6
-
PD0.2
PD0.6
PP1.2
PP1.6
-
PD1.2
PD1.6
-
-
A4
A8
RDT.2
RDT.6
RDT.10
RDT.14
PDIEN.2
PDIF.2
PBIEN.2
PBIF.2
PPACR.2
PPBCR.2
PPCCR.2
PPDCR.2
-
PP0.1
PP0.5
PDF0.1
PD0.1
PD0.5
PP1.1
PP1.5
PDF1.1
PD1.1
PD1.5
-
A1
A3
A7
RDT.1
RDT.5
RDT.9
RDT.13
PDIEN.1
PDIF.1
PBIEN.1
PBIF.1
PPACR.1
PPBCR.1
PPCCR.1
PPDCR.1
-
PP0.0
PP0.4
PDF0.0
PD0.0
PD0.4
PP1.0
PP1.4
PDF1.0
PD1.0
PD1.4
-
A0
A2
A6
RDT.0
RDT.4
RDT.8
RDT.12
PDIEN.0
PDIF.0
PBIEN.0
PBIF.0
PPACR.0
PPBCR.0
PPCCR.0
PPDCR.0
PPECR.0
SH69P48
R/W Remarks
Bit0: Set PWM1 Enable
R/W Bit2, Bit1: Select PWM1 clock
Bit3: Set PWM1 output mode of duty cycle
R/W PWM0 period low nibble
R/W PWM0 period high nibble
R/W PWM0 duty fine tune nibble
R/W PWM0 duty low nibble
R/W PWM0 duty high nibble
R/W PWM1 period low nibble
R/W PWM1 period high nibble
R/W PWM1 duty fine tune nibble
R/W PWM1 duty low nibble
R/W PWM1 duty high nibble
- Reserved
R ADC data low nibble (Read only)
R ADC data medium nibble (Read only)
R ADC data high nibble (Read only)
R/W ROM Data table address / data register
R/W ROM Data table address / data register
R/W ROM Data table address / data register
R/W ROM Data table address / data register
R/W PORTD interrupt enable flags
R/W PORTD interrupt request flags
R/W PORTB interrupt enable flags
R/W PORTB interrupt request flags
R/W PORTA pull-up control
R/W PORTB pull-up control
R/W PORTC pull-up control
R/W PORTD pull-up control
R/W PORTE pull-up control
11/41
V0.0
11 Page | ||
| Páginas | Total 41 Páginas | |
| PDF Descargar | [ Datasheet SH69P48.PDF ] | |
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