DAP018A Datasheet PDF - ON Semiconductor
Part Number | DAP018A | |
Description | PWM Current-Mode Controller | |
Manufacturers | ON Semiconductor | |
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DAP018A/B/C/D/F
PWM Current-Mode
Controller for High-Power
Universal Off-Line Supplies
Housed in a SO−14 package, the DAP018X represents an
enhanced version of the currently available Speedking
controller, the DAP011.
With an internal structure operating at a fixed 65 kHz or
100 kHz frequency, the controller directly connects to the
high−voltage rail for a lossless and clean startup sequence.
Current−mode control also provides an excellent input
audio−susceptibility and inherent pulse−by−pulse control.
Internal ramp compensation easily prevents sub−harmonic
oscillations from taking place in continuous conduction
mode designs. On top of these features, the device takes
advantage of the auxiliary winding negative swing to let the
user adjust the maximum power the converter can deliver in
high line conditions (OPP).
When the current setpoint falls below a given value, e.g.
the output power demand diminishes, the IC automatically
freezes the peak current and reduces its switching frequency
down to 25 kHz. At this point, if further output power
reduction occurs, the controller enters skip−cycle.
The DAP018X features an efficient protective circuitry
which, in presence of an overcurrent condition, disables the
output pulses while the device enters a safe burst mode,
trying to re−start. Once the fault has gone, the device
auto−recovers. By implementing a timer to acknowledge a
fault condition, independently from the auxiliary supply, the
designer’s task is eased when stringent fault mode
conditions need to be met.
A dedicated input helps triggering a latch−off circuitry
which permanently disables output pulses, for instance to
implement an over voltage protection (OVP). A separate
input accepts a direct NTC connection to ground for a simple
and efficient over temperature protection (OTP).
Features
• Fixed−frequency 65 kHz (A and B versions) or 100 kHz
(C and D versions) Current−mode Control Operation
• Internal and Adjustable Over Power Protection (OPP)
Circuit
• Frequency Foldback down to 25 kHz and Skip−cycle in
Light Load Conditions
• Reduced Internal Bias Currents for Improved Standby
Performance
• Adjustable Brown−out Protection (B and D versions)
• Internal Ramp Compensation
• Internal Fixed 5 ms Soft−Start
• Adjustable Frequency Jittering for Better EMI Signature
• Auto−recovery internal output short−circuit protection
for A, B, C and D versions. F is latched
• Adjustable Timer for Improved Short−circuit Protection
• OTP and OVP Inputs for Improved Robustness
• +500 mA / −800 mA Peak Current Capability
• Up to 28 V VCC Operation
• Improved Creepage Distance between High−voltage
and Adjacent Pin
• Extremely Low No−load Standby Power
• This is a Pb−Free Device
• This Device uses Halogen−Free Molding Compound
Typical Applications
• High Power ac−dc Converters for TVs, Set−top Boxes etc.
• Offline Adapters for Notebooks
14
1
SOIC−14
D SUFFIX
CASE 751A
x = Device Version
A = Assembly Location
WL = Wafer Lot
Y = Year
WW = Work Week
G = Pb−Free Package
MARKING
DIAGRAM
14
DAP018x
AWLYWWG
1
PIN CONNECTIONS
OPP
OVP
CTimer
Jittering
Fold
FB
CS
1
2
3
4
5
6
7
14 HV
13 NC
12 OTP
11 BO(B&D)
10
9
VCC
DRV
8 GND
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
†For information on tape and reel specifications, including part
orientation and tape sizes, please refer to our Tape and Reel
Packaging Specifications Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2009
July, 2009 − Rev. 0
1
Publication Order Number:
DAP018/D
|
|
DAP018A/B/C/D/F
MAXIMUM RATINGS TABLE
Symbol
Rating
Value
Unit
VCCmax
ICCmax
Maximum Power Supply Voltage, VCC Pin, Continuous Voltage
Maximum Current for VCC Pin
Maximum Voltage on Low Power Pins (Except Pins 9, 10 and 14)
−0.3 to 28
$30
−0.3 to 10
V
mA
V
IOPP
Maximum Injected Negative Current into the OPP Pin (Pin 1)
−2 mA
RθJ−A
TJMAX
Thermal Resistance Junction−to−Air
Maximum Junction Temperature
Storage Temperature Range
120
150
−60 to +150
°C/W
°C
°C
ESD Capability, Human Body Model (All pins except HV)
2 kV
ESD Capability, Machine Model
180 V
Maximum Voltage on Pin 14 (HV)
−0.3 to 500
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
NOTES:This device(s) contains ESD protection and exceeds the following tests:
Human Body Model 2000V per JEDEC Standard JESD22−A114E
Machine Model 200V per JEDEC Standard JESD22−A115−A
This device contains latch−up protection and exceeds 100 mA per JEDEC Standard JESD78 except pin 12.
ELECTRICAL CHARACTERISTICS
(For typical values TJ = 25°C, for min/max values TJ = −25°C to +125°C, Max TJ = 150°C, VCC = 12 V unless otherwise noted)
Symbol
Rating
Pin Min Typ Max Unit
SUPPLY SECTION
VCCON VCC increasing level at which the current source turns−off
VCC(min) VCC level below which output pulses are stopped
VCClatch VCC decreasing level at which the latch−off phase ends
VCCreset Internal latch reset level
resetHyst Minimum voltage difference between VCClatch and VCCreset, TJ > 0°C
VCCTSD VCC voltage when the TSD is activated (Note 2)
ICC1 Internal IC consumption, no output load on pin 9
ICC1light ICC1 for a feedback voltage equal to Vfold (internal bias reduction)
ICC2 Internal IC consumption, 1 nF output load on pin 9
ICC3 Internal IC consumption, latch−off phase
ITSD Current consumption in TSD mode
INTERNAL START−UP CURRENT SOURCE – High−voltage pin biased to 60 Vdc.
10 14 15 16 V
10 8
9 10 V
10 7.2 7.5 8.0 V
10 5
V
− 0.8
V
− 6.5 7.1 V
10 1.9 mA
10 1.5 mA
10 2.7 mA
10 0.6 mA
− 400 mA
Symbol
Rating
Pin Min Typ Max Unit
IC2 High−voltage current source, VCC = 10 V
IC1 High−voltage current source, VCC = 0, TJ = 25°C
VTh VCC transition level for IC1 to IC2 toggling point
Ileak Leakage current for the high voltage source,
Vpin 14 = 500 Vdc, VCC = 12 V, TJ > 0°C
14 3 6 9 mA
14 150 650 1200 mA
14 0.9
V
14 1
15 30 mA
DRIVE OUTPUT
Symbol
Rating
Pin Min Typ Max Unit
Tr Output voltage rise−time @ CL = 1 nF, 10−90% of a 12 V output signal
9 − 40 − ns
1. See characterization table for linearity over negative bias voltage.
2. Guaranteed by design.
3. The OTP parameters are selected to cope with a TTC03−474 which offers a resistance of 8.8 kW when heated to a temperature of 110°C.
4. The brown−out circuitry is disabled on versions A & C and operates on versions B & D.
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