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Número de pieza | CM-A510 | |
Descripción | Computer on Module Reference Guide | |
Fabricantes | CompuLab | |
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Hay una vista previa y un enlace de descarga de CM-A510 (archivo pdf) en la parte inferior de esta página. Total 44 Páginas | ||
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Reference Guide
1 page Revision Information
Table 1 Revision Notes
Date
November 2010
First release
Description
Please check for a newer revision of this manual at CompuLab's web site – http://www.compulab.co.il/.
Compare the revision notes of the updated manual from the web site to those of the printed or
electronic version you have.
Revised November 2010
CM-A510 Reference Guide
5
5 Page Core system components
3 CORE SYSTEM COMPONENTS
3.1 Armada 510 SoC
The Marvell Armada 510 is a high-performance, highly integrated, low-power SoC with a high-end
ARM-compatible processor, a graphics processing unit, high definition video decoding acceleration
hardware and a broad range of peripherals. The Armada 510 integrates an ARMv6/v7-compliant,
high-speed, dual-issue Sheeva CPU core with double precision integrated Floating Point Unit (FPU)
and WMMX2 coprocessor, 32-KB L1 Data cache, 32-KB instruction cache and 512-KB L2 cache. It
also includes an advanced power management unit, an advanced 2D/3D graphics processing unit,
display controllers and a high-definition video decoder.
The Armada 510 integrates the following hardware engines to enhance performance:
· High-definition Video Decoding Unit (VMeta)
· 2D/3D Graphics Processing Unit (GPU)
· Power Management Unit supporting SoC low power states, Dynamic Frequency Scaling
(DFS) and Dynamic Voltage Scaling (DVS)
· Two XOR DMA engines and 16-channel peripheral DMA controller
Figure 2 Armada 510 Block Diagram
Revised November 2010
CM-A510 Reference Guide
11
11 Page |
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CM-A510 | Computer on Module Reference Guide | CompuLab |
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