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PDF MST719DE Data sheet ( Hoja de datos )
| Número de pieza | MST719DE | |
| Descripción | LCD TV Processor | |
| Fabricantes | Mstar | |
| Logotipo |  |
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 1. Datasheet - LCD TV Processor  Hay una vista previa y un enlace de descarga de MST719DE (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
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MST719DE
LCD TV Processor with Video Decoder/HDMI
Preliminary Data Sheet Version 0.1
FEATURES
n Video Decoder
Ÿ Supports NTSC, PAL and SECAM video input
formats
Ÿ 2-D NTSC and PAL comb filter for Y/C
separation of CVBS input
Ÿ Multiple CVBS and S-video inputs
Ÿ Supports Closed-caption and V-chip
Ÿ Supports Teletext 1.5 and capable Teletext 10
page navigation
Ÿ ACC, AGC, and DCGC (Digital Chroma Gain
Control)
n Analog Input
Ÿ Supports RGB input format from PC,
camcorders and GPS
Ÿ Supports YCbCr inputs from conventional video
source and HDTV
Ÿ Supports SCART-RGB with Fast Blanking input
Ÿ Supports video input 480i, 480p, 576i, 576p,
720p, 1080i; RGB input resolution in 640x480,
800x480, 800x600, 1024x768, 1280x1024,
1366x768, 1440x900, 1680x1050 (WSXGA+)
Ÿ 3-channel low-power 10-bit ADCs integration
for YCbCr and RGB
Ÿ Supports RGB composite sync input (CSYNC),
SOY, SOG, HSYNC, and VSYNC
Ÿ On-chip clock synthesizer and PLL
Ÿ Auto-position adjustment, auto-phase
adjustment, auto-gain adjustment, and
auto-mode detection
n Digital Input
Ÿ HDMI 1.3A, HDCP 1.2, and DVI 1.0 compliant
receiver
Ÿ TMDS clock operation speed 25MHz ~225MHz
(up to 1080P 60Hz 12-bit resolution)
Ÿ Supports ITU-BT.656 shared with GPIO pins
n Color Engine
Ÿ Brightness, contrast, saturation, and hue
adjustment
Ÿ 9-tap programmable multi-purpose FIR (Finite
Impulse Response) filter
Ÿ Differential 3-band peaking engine
Ÿ Vertical peaking
Ÿ Spatial noise reduction
Ÿ Luminance Transient Improvement (LTI)
Ÿ Chrominance Transient Improvement (CTI)
Ÿ Black Level Extension (BLE)
Ÿ White Level Extension (WLE)
Ÿ Favor Color Compensation (FCC)
Ÿ 3-channel gamma curve adjustment
Ÿ Independent 6 color of saturation, hue, and
brightness control
n Scaling Engine/Panel Interface
Ÿ Pixel clock of panel output supports up to
150Mhz
Ÿ Supports digital panels up to
1366x768,1440x900 and 1680x1050
Ÿ Supports single/dual 8-bit LVDS panel outputs
Ÿ Supports 8-bit TTL panel output
Ÿ Supports mini-LVDS output with TCON signals
Ÿ Supports various displaying modes
Ÿ Supports horizontal panorama scaling
n Miscellaneous
Ÿ Built-in MCU
Ÿ 3-wire serial bus interface for configuration
setup
Ÿ Built-in internal OSD with 512 programmable
fonts, 1 2 or 3 bit per pixel color, 256-color
palettes, and 24-bit color resolution
Ÿ Supports CVBS out
Ÿ Supports digital I2S and SPDIF output
Ÿ Spread spectrum clocks
Ÿ 3.3V output pads with programmable driving
current
Ÿ 128-pin LQFP package
Version 0.1
-1-
Copyright 2007 MStar Semiconductor, Inc. All rights reserved.
12/25/2007
1 page  
MST719DE
LCD TV Processor with Video Decoder/HDMI
Preliminary Data Sheet Version 0.1
Pin Name
VCOM0
CVBSOUT
Pin Type
Analog Input
Analog Output
Function
CVBS Video Input Reference Ground
CVBS (Composite) Video Output
Analog Audio Input/Output Interface
Pin Name
MCKO
AMUTE
AUWS
AUSCK
AUSD
SPDIFO
Pin Type
Output
Output
Output
Output
Output
Output
Function
I2S Audio Master Clock Output
I2S Audio Output Mute Control
I2S Word Select Output; 4mA driving strength
I2S Audio Bit Clock Output
I2S Audio Serial Data Output; 4mA driving strength
Audio S/PDIF Output; 4mA driving strength
Pin
39
40
Pin
48
49
50
51
52
53
DVI/HDMI Interface
Pin Name
RX0N
RX0P
RX1N
RX1P
RX2N
RX2P
RXCKN
RXCKP
HPLUG
Pin Type
Input
Input
Input
Input
Input
Input
Input
Input
Input
LVDS Interface
Pin Name
LVA0P
LVA0M
LVA1P
LVA1M
LVA2P
LVA2M
LVA3P
LVA3M
Pin Type
Output
Output
Output
Output
Output
Output
Output
Output
Function
Negative DVI/HDMI Input for Data Channel 0
Positive DVI/HDMI Input for Data Channel 0
Negative DVI/HDMI Input for Data Channel 1
Positive DVI/HDMI Input for Data Channel 1
Negative DVI/HDMI Input for Data Channel 2
Positive DVI/HDMI Input for Data Channel 2
Negative DVI/HDMI Input for Clock Channel
Positive DVI/HDMI Input for Clock Channel
Hot Plug Detection for DVI/HDMI
Function
LVDS A-Link Channel 0 Positive Data Output
LVDS A-Link Channel 0 Negative Data Output
LVDS A-Link Channel 1 Positive Data Output
LVDS A-Link Channel 1 Negative Data Output
LVDS A-Link Channel 2 Positive Data Output
LVDS A-Link Channel 2 Negative Data Output
LVDS A-Link Channel 3 Positive Data Output
LVDS A-Link Channel 3 Negative Data Output
Pin
3
4
6
7
8
9
128
1
10
Pin
87
86
81
80
77
76
73
72
Version 0.1
-5-
Copyright 2007 MStar Semiconductor, Inc. All rights reserved.
12/25/2007
5 Page 
MECHANICAL DIMENSIONS
MST719DE
LCD TV Processor with Video Decoder/HDMI
Preliminary Data Sheet Version 0.1
Version 0.1
- 11 -
Copyright 2007 MStar Semiconductor, Inc. All rights reserved.
12/25/2007
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet MST719DE.PDF ] | |
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