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PDF BD9011KV Data sheet ( Hoja de datos )
| Número de pieza | BD9011KV | |
| Descripción | High-efficiency Switching Regulators | |
| Fabricantes | ROHM Semiconductor | |
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TECHNICAL NOTE
Large Current External FET Controller Type Switching Regulator
Step-down,
High-efficiency
Switching Regulators
(Controller type)
BD9011EKN , BD9011KV , BD9775FV
■ BD901 1EKN, BD9011KV
●Overview
The BD9011EKN/KV is a 2-ch synchronous controller with rectification switching for enhanced power management efficiency.
It supports a wide input range, enabling low power consumption ecodesign for an array of electronics.
●Features
1) Wide input voltage range: 3.9V to 30V
2) Precision voltage references: 0.8V±1%
3) FET direct drive
4) Rectification switching for increased efficiency
5) Variable frequency: 250k to 550kHz (external synchronization to 550kHz)
6) Built-in selected OFF latch and auto remove over current protection
7) Built-in independent power up/power down sequencing control
8) Make various application , step-down , step-up and step-up-down
9) Small footprint packages: HQFN36V, VQFP48C
●Applications
Car audio and navigation systems, CRTTV，LCDTV，PDPTV，STB，DVD，and PC systems，portable CD and DVD players,
etc.
●Absolute Maximum Ratings (Ta=25℃)
Parameter S
ymbol
EXTVCC Voltage
EXTVCC
Rating
34 *1 V
Unit
Parameter S
COMP1,2 Voltage
ymbol
COMP1,2
Rating Unit
VCCCL1,2 Voltage
VCCCL1,2
34 *1
V
DET1,2 Voltage
DET1,2
VREG5 V
CL1,2 Voltage
CL1,2
34
V
RT､SYNC Voltage
RT､SYNC
SW1,2 Voltage
BOOT1,2 Voltage
BOOT1,2-SW1,2
Voltage
STB, EN1,2 Voltage
SW1,2
BOOT1,2
BOOT1,2-SW1,2 7
34 *1
40 *1
*1 V
STB, EN1,2
VCC
V
V
V
Power Dissipation
0.875 *2
W
（HQFN36V）
Pd
1.1 *2
（VQFP48C）
W
VREG5,5A
VREG5,5A 7
V
Operating
temperature
Topr
-40 to +105
℃
VREG33 VREG
33 VREG5 V Storage temperature Tstg -55 to +150 ℃
SS1,2､FB1,2
SS1,2､FB1,2
VREG5
V Junction temperature
Tj +150
℃
*1 Regardless of the listed rating, do not exceed Pd in any circumstances.
*2 Mounted on a 70mm x 70mm x 0.8mm glass-epoxy board. De-rated at 7.44mW/℃（HQFN36V） or 8.8mW/℃（VQFP48C）
above 25℃.
Sep. 2008
http://www.Datasheet4U.com
1 page  
●Pin configuration
● Pin function table
BD9011KV（VQFP48C）
36 35 34 33 32 31 30 29 28 27 26 25
SS2 37
COMP2 38
FB2 39
N.C 40
EXTVCC 41
N.C 42
N.C 43
VREG5 44
N.C 45
OUTL2 46
DGND2 47
SW2 48
24 DET1
23 SS1
22 COMP1
21 FB1
20 N.C
19 VREG33
18 N.C
17 VREG5A
16 N.C
15 OUTL1
14 DGND1
13 SW1
1 2 3 4 5 6 7 8 9 10 11 12
Fig-15
●Block functional descriptions
Pin
No.
Pin name
1 OUTH2
2 BOOT2
3 CL2
4 N.C
5 VCCCL2
6 N.C
7 VCC
8 VCCCL1
9 N.C
10 CL1
11 BOOT1
12 OUTH1
13 SW1
14 DGND1
15 OUTL1
16 N.C
17 VREG5A
18 N.C
19 VREG33
20 N.C
21 FB1
22 COMP1
23 SS1
24 DET1
25 STB
26 EN1
27 EN2
28 N.C
29 GND
30 GNDS
31 LOFF
32 N.C
33 RT
34 SYNC
35 LLM
36 DET2
37 SS2
38 COMP2
39 FB2
40 N.C
41 EXTVCC
42 N.C
43 N.C
44 VREG5
45 N.C
46 OUTL2
47 DGND2
48 SW2
Function
High side FET gate drive pin 2
OUTH2 driver power pin
Over current detection pin 2
Non-connect (unused) pin
Over current detection VCC2
Non-connect (unused) pin
Input power pin
Over current detection CC1
Non-connect (unused) pin
Over current detection setting pin 1
OUTH1 driver power pin
High side FET gate drive pin 1
High side FET source pin 1
Low side FET source pin 1
Low side FET gate drive pin 1
Non-connect (unused) pin
FET drive REG input
Non-connect (unused) pin
Reference input REG output
Non-connect (unused) pin
Error amp input 1
Error amp output 1
Soft start setting pin 1
FB detector output 1
Standby ON/OFF pin
Output 1 ON/OFF pin
Output 2 ON/OFF pin
Non-connect (unused) pin
Ground
Sense ground
Over current protection OFF latch
function ON/OFF pin
Non-connect (unused) pin
Switching frequency setting pin
External synchronous pulse input pin
Built-in pull-down resistor pin
FB detector output 2
Soft start setting pin 2
Error amp output 2
Error amp input 2
Non-connect (unused) pin
External power input pin
Non-connect (unused) pin
Non-connect (unused) pin
FET drive REG output
Non-connect (unused) pin
Low side FET gate drive pin 2
Low side FET source pin 2
High side FET source pin 2
・Error amp
The error amp compares output feedback voltage to the 0.8V reference voltage and provides the comparison result as COMP voltage, which is
used to determine the switching Duty. COMP voltage is limited to the SS voltage, since soft start at power up is based on SS pin voltage.
・Oscillator (OSC)
Oscillation frequency is determined by the switching frequency pin (RT) in this block. The frequency can be set between 250kHz and 550kHz.
・ SLOPE
The SLOPE block uses the clock produced by the oscillator to generate a triangular wave, and sends the wave to the PWM comparator.
・PWM COMP
The PWM comparator determines switching Duty by comparing the COMP voltage, output from the error amp, with the triangular wave from the
SLOPE block. Switching duty is limited to a percentage of the internal maximum duty, and thus cannot be 100% of the maximum.
・Reference voltage (5Vreg，33Vreg)
This block generates the internal reference voltages: 5V and 3.3V.
・External synchronization (SYNC)
Determines the switching frequency, based on the external pulse applied.
・Over current protection (OCP)
Over current protection is activated when the VCCCL-CL voltage reaches or exceeds 90mV. When over current protection is active, Duty is low,
and output volt age also decreases. When LOF F=L, the output volt age has fallen to 70% or belo w and output is latched OF F. The OFF latch
mode ends when the latch is set to STB, EN.
・Sequence control (Sequence DET)
Compares FB voltage with reference voltage (0.56V) and outputs the result as DET.
・Protection circuits (UVLO/TSD)
The UVLO lock out function is a ctivated when VREG falls to about 2.8V, while TSD turns output s OFF when the chip temperatu re reaches or
exceeds 150℃. Output is restored when temperature falls back below the threshold value.
5/29
5 Page 
When electrolytic or other high-ESR output capacitors are used:
Phase compensation is re latively simple for app lications employing high-ESR output ca pacitors (on the order of sev eral
Ω). In DC/DC converter ap plications, where LC resona nce circ uits are alw ays incorporated, the phase margin at these
locations is -180°. However, wherever ESR is present, a 90° phase lead is generated, limiting the net phase margin to -90°
in the presence of ESR. Si nce the d esired phas e marg in is in a ran ge less tha n 1 50°, this is a h ighly advantageous
approach in terms of the phase margin. However, it also has the drawback of increasing output voltage ripple components.
③ LC resonance circuit
Vcc
④ ESR connected
Vcc
Vo
L
C
Fig-28
Vo
L RESR
C Fig-29
1
fr = 2π√LC [Hz]
Resonance point phase margin -180°
reson ance point1
fr = 2π√LC
[ Hz]：Resonance Point
1
fESR = 2πRESRC [Hz] :Zero
-90°:Pole
Since ESR changes the phase characteristics, only one phase lead need be provided for high-ESR applications. Please choose
one of the following methods to add the phase lead.
⑤ Add C to feedback resistor
Vo
R1
C1 C2
FB
A
R2
COMP
⑥ Add R3 to aggregator
Vo
R1
R3 C2
FB
A
R2
COMP
Fig-30
F
ig-31
Phase lead fz = 1 [ Hz]
2πC1R1
P hase lead fz = 1 [ Hz]
2πC2R3
Set the phase lead frequency close to the LC resonance frequency in order to cancel the LC resonance.
When using ceramic, OS-CON, or other low-ESR capacitors for the output capacitor:
Where low-ESR (on the order of tens of m Ω) output cap acitors are em ployed, a t wo phase-lead insertion scheme is
required, but this is different from the approach described in figure ③~⑥, since in this case the LC resonance gives rise
to a 180° pha se margin/d elay. Here, a pha se com pensation method su ch as that show n i n figure ⑦ below c an b e
implemented.
⑦ Phase compensation provided by secondary (dual) phase lead
Vo
R1
R2
C1 R3 C2
FB
A
COMP
Phase lead fz1 =
1
2πR1C1
[Hz]
Phase lead fz2 =
1
2πR3C2
[Hz]
LC resonance frequency fr =
1
2π√LC
[Hz]
Fig-32
Once the phase-lead frequency is determined, it should be set close to the LC resonance frequency.
This technique simplifies the phase topology of the DCDC Converter. Therefore, it might need a certain amount
of trial-and-error process. There are many factors(The PCB board layout, Output Current, etc.)that can affect
the DCDC characteristics. Please verify and confirm using practical applications.
11/29
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet BD9011KV.PDF ] | |
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