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PDF AK8181G Data sheet ( Hoja de datos )
| Número de pieza | AK8181G | |
| Descripción | 3.3V LVDS 1:4 Clock Fanout Buffer | |
| Fabricantes | AKM | |
| Logotipo |  |
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AK8181G
3.3V LVDS 1:4
Preliminary Clock Fanout Buffer
AK8181G
Features
Four differential 3.3V LVDS outputs
Selectable two LVCMOS/LVTTL clock inputs
Clock output frequency up to 650MHz
Translates LVCMOS/LVTTL input signals to
LVDS levels
Output skew : 30ps (maximum)
Part-to-part skew : 500ps (maximum)
Propagation delay : 2.2ns (maximum)
Additive phase jitter(RMS): 0.1ps (typical)
Operating Temperature Range: -40 to +85℃
Package: 20-pin TSSOP (Pb free)
Pin compatible with ICS8545I
Description
The AK8181G is a member of AKM’s LVDS clock
fanout buffer family designed for telecom,
networking and computer applications, requiring a
range of clocks with high performance and low
skew. The AK8181G distributes 4 buffered clocks.
AK8181G are derived from AKM’s long-term-
experienced clock device technology, and enable
clock output to perform low skew. The AK8181G is
available in a 20-pin TSSOP package.
Block Diagram
draft-E-01
-1-
Feb-2013
http://www.Datasheet4U.com
1 page  
AK8181G
AC Characteristics
All specifications at VDD=3.3V5%, VSS=0V, Ta: -40 to +85℃, unless otherwise noted
Parameter
Symbol
Conditions
MIN TYP MAX Unit
Output Frequency
fOUT
650 MHz
Propagation Delay (1)
Output Skew (2) (3)
Part-to-Part Skew (3) (4)
Buffer Additive Jitter, RMS (5)
Output Rise/Fall Time (5)
tPD
tsk(O)
tskPP
tjit
tr, tf
0.7
156.25MHz (12kHz – 20MHz)
20% to 80% @50MHz
100
2.2 ns
30 ps
500 ps
0.1 ps
500 ps
Output Duty Cycle
DCOUT
45
All parameters measured at f ≤ 650MHz unless noted otherwise.
The cycle to cycle jitter on the input will equal the jitter on the output. The part does not add jitter.
(1) Measured from VDD/2 of the input to the differential output crossing point.
(2) Defined as skew between outputs at the same supply voltage and with equal load conditions.
(3) This parameter is defined in accordance with JEDEC Standard 65.
55 %
(4) Defined as skew between outputs on different devices operating at the same supply voltages and with equal load
conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points.
(5) Design value.
draft-E-01
-5-
Feb-2013
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet AK8181G.PDF ] | |
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