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PDF ACPL-071L Data sheet ( Hoja de datos )
| Número de pieza | ACPL-071L | |
| Descripción | Single-channel and Dual-channel High Speed 15 MBd CMOS optocoupler | |
| Fabricantes | AVAGO | |
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ACPL-071L and ACPL-074L
Single-channel and Dual-channel High Speed 15 MBd
CMOS optocoupler with Glitch-Free Power-Up Feature
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
Description
The ACPL-071L (single-channel) and ACPL-074L (dual-
channel) are 15 MBd CMOS optocouplers in SOIC-8 pack-
age. The optocouplers utilize the latest CMOS IC technol-
ogy to achieve outstanding performance with very low
power consumption. Basic building blocks of ACPL-071L
and ACPL-074L are high speed LEDs and CMOS detector
ICs. Each detector incorporates an integrated photodiode,
a high speed transimpedance amplifier, and a voltage
comparator with an output driver.
Component Image
ACPL-071L
NC 1
8 VDD
ANODE 2
CATHODE 3
7 NC
6 VO
NC 4 SHIELD
5 GND
ANODE1 1
CATHODE1 2
CATHODE2 3
ACPL-074L
8 VDD
7 Vo1
6 Vo2
ANODE2 4 SHIELD
TRUTH TABLE
5 GND
LED VO, OUTPUT
OFF H
ON L
A 0.1uF bypass capacitor must be connected between pins 5 and 8.
Features
• +3.3V and +5 V CMOS compatibility
• 30 ns max. pulse width distortion
• 40ns max. propagation delay (for 3.3V supply voltage)
• 30 ns max. propagation delay skew
• High speed: 15 MBd min
• 10 kV/µs minimum common mode rejection
• –40 to 105°C temperature range
• Glitch-Free Power-Up Feature
• Safety and regulatory approvals pending:
• UL recognized
• 3750 V rms for 1 min. per UL 1577
• CSA component acceptance Notice #5
• IEC/EN/DIN EN 60747-5-2 approved Option 060
Applications
• Digital field bus isolation:
• CANBus, RS485, USB
• Multiplexed data transmission
• Computer peripheral interface
• Microprocessor system interface
• DC/DC converter
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.
http://www.Datasheet4U.com
1 page  
Insulation and Safety Related Specifications
Parameter
Symbol
Minimum External Air
Gap (Clearance)
L(I01)
Minimum External
Tracking (Creepage)
L(I02)
Minimum Internal Plastic
Gap (Internal Clearance)
Tracking Resistance
CTI
(Comparative Tracking Index)
Isolation Group
Value
4.9
4.8
0.08
≥175
IIIa
Units
mm
mm
mm
Volts
Conditions
Measured from input terminals to output terminals,
shortest distance through air.
Measured from input terminals to output terminals,
shortest distance path along body.
Insulation thickness between emitter and detector;
also known as distance through insulation.
DIN IEC 112/VDE 0303 Part 1
Material Group (DIN VDE 0110, 1/89, Table 1)
All Avago Technologies data sheets report the creepage
and clearance inherent to the optocoupler component it-
self. These dimensions are needed as a starting point for
the equipment designer when determining the circuit
insulation requirements. However, once mounted on a
printed circuit board, minimum creepage and clear-
ance requirements must be met as specified for individual
equipment standards. For creepage, the shortest distance
path along the surface of a printed circuit board between
the solder fillets of the input and output leads must be
considered. There are recommended techniques such as
grooves and ribs which may be used on a printed circuit
board to achieve desired creepage and clearances. Creep-
age and clearance distances will also change depending
on factors such as pollution degree and insulation level.
5 Page 
The tPSK specified optocouplers offer the advantages of
guaranteed specifications for propagation delays, pulse-
width distortion and propagation delay skew over the rec-
ommended temperature, and power supply ranges.
Powering Sequence
VDD needs to achieve a minimum level of 3.0V before
powering up the output connecting component.
Input Limiting Resistors
ACPL-071L and ACPL-074L are direct current driven (Figure
8), and thus eliminate the need for input power supply. To
limit the amount of current flowing through the LED, it is
recommended that a 210ohm resistor is connected in se-
ries with anode of LED (i.e. Pin 2 for ACPL-071L and Pin 1
and 4 for ACPL-074L) at 5V input signal. At 3.3V input sig-
nal, it is recommended to connect 80ohm resistor in series
with anode of LED.
The recommended limiting resistors are based on the
assumption that the driver output impedence is 50Ω (as
shown in Figure 11).
Speed Improvement
A peaking capacitor can be placed across the input cur-
rent limit resistor (Figure 11) to achieve enhanced speed
performance. The value of the peaking cap is dependent
to the rise and fall time of the input signal and supply volt-
ages and LED input driving current (If). Figure 12 shows
significant improvement of propagation delay and pulse
with distortion with added peak capacitor at driving cur-
rent of 14mA and 3.3V or 5V power supply.
R drv =50Ω
+
Vin
-
Cpeak
R limit
0.1µF
VDD2
VO
GND1
SHIELD
GND 2
Figure 11 Connection of peaking capacitor (Cpeak) in parallel of the input
limiting resistor (Rllimit) to improve speed performance
35.00
30.00
25.00
20.00
15.00
10.00
5.00
tPLH
tPHL
|PWD|
tPHL
With peaking cap
Without peaking cap
tPLH
0.00-40 -20
0 20 40 60
TA - TEMPERATURE -oC
80 100
30.00
25.00
tPHL
20.00
15.00
10.00
5.00
0.00-40
tPLH
tPHL
tPLH
With peaking cap
Without peaking cap
|PWD|
-20 0 20 40 60 80 100
TA - TEMPERATURE -oC
(i) VDD=3.3V, Cpeak=100pF, Rlimit=80Ω
(ii) VDD=5V, Cpeak=100pF, Rlimit=210Ω
Figure 12. Improvement of tp and PWD with added 100pF peaking capacitor in parallel of input limiting resistor.
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet ACPL-071L.PDF ] | |
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