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PDF AK1590 Data sheet ( Hoja de datos )
| Número de pieza | AK1590 | |
| Descripción | 1GHz Delta-Sigma Fractional-N Frequency Synthesizer | |
| Fabricantes | AKM | |
| Logotipo |  |
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[AK1590]
AK1590
1GHz Delta-Sigma Fractional-N Frequency Synthesizer
1. Overview
AK1590 is a Delta-Sigma Fractional-N PLL (Phase Locked Loop) frequency synthesizer with a frequency switching
function, covering a wide range of frequencies from 60 to 1000MHz. This product consists of an 18-bit Delta-Sigma
modulator, a low-noise phase frequency comparator, a highly accurate charge pump, a reference divider, dual-module
prescaler (P/P+1) and frequency offset adjustable circuits.
2. Features
Operating frequency:
Programmable charge pump current:
60 to 1000MHz
In a normal operating scheme, the charge pump current can be set
in 8 steps, in the range from 20 to 168μA.
In a Fast Lockup scheme, the charge pump current can be set in
8 steps, in the range from 0.8 to 2.3mA.
Supply Voltage:
2.7 to 5.5 V (PVDD pin)
Separate power supply for the charge pump: PVDD to 5.5V (CPVDD pin)
On-chip power-saving features
Frequency offset adjustable function:
No glitch operation for AFC(Automatic Frequency Control) and
DFM(Digital Frequency Modulation);
When the offset adjustable register is accessed, INT and NUM are
General-purpose output:
recalculated internally.
Two general-purpose output ports to control peripheral parts
Low phase noise:
Low consumption current:
Package:
Operating temperature:
-201dBc/Hz
2.5mA typ
24pin QFN (0.5mm pitch, 4mm4mm0.7mm)
-40 to +85°C
MS1478-E-01
1
2013/2
http://www.Datasheet4U.com
1 page  
[AK1590]
24 23 22 21 20 19
CPVDD 1
18 PVDD
TEST3 2
17 RFINP
TEST1 3
LE 4
TOP
VIEW
16 RFINN
15 VREF
DATA 5
14 DVSS
CLK 6
13 GPO2
7 8 9 10 11 12
Fig. 2 Package Pin Layout
MS1478-E-01
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2013/2
5 Page 
[AK1590]
8. Block Functional Descriptions
1. Frequency Setup
AK1590 is a Fractional-N type synthesizer that takes 218 as the denominator, which calculates the integer and numerator
to be set using the following formulas:
Frequency setting = FPFD × (Integer + Numerator / 218)
Integer = ROUND (Target Frequency / FPFD)
Numerator = ROUND {(Target Frequency – Integer × FPFD) / (FPFD / 218)}
Note) ROUND: Rounded off to the nearest integer
FPFD : Phase Frequency Detector comparative Frequency (= [REFIN] input frequency / R divider ratio)
Calculation examples
Example 1) The numerator is positive; when the target frequency is 950.0375MHz and FPFD is 1MHz.
Integer = 950.0375MHz / 1MHz = 950.0375
It is rounded off to 950 (decimal) = 3B6 (hexadecimal) = 0011 1011 0110 (binary)
Numerator = (950.0375MHz - 950 × 1MHz) / (1MHz / 218) = 9830.4
It is rounded off to 9830 (decimal) = 2666 (hexadecimal) = 10 0110 0110 0110 (binary)
Frequency setting =1MHz × (950 + 9830 / 218) = 950.0374985MHz
(In this case the frequency error is 1.5Hz.)
Example 2) The numerator is negative; when the target frequency is 950.550MHz and FPFD is 1MHz.
Integer = 950.550MHz / 1MHz = 950.550
It is rounded off to 951 (decimal) = 3B7 (hexadecimal) = 0011 1011 0111 (binary)
Numerator = (950.550MHz - 951 × 1MHz) / (1MHz / 218) = -117964.8
It is rounded off to -117965 (decimal), which is reduced from 218 to be converted into
binary for 2's complementary expression.
218 - 117965 (decimal) = 144179 (decimal) = 23333 (hexadecimal) = 10 0011 0011 0011
0011 (binary)
Frequency setting =1MHz × (951 + (-117965/218)) = 950.5499992MHz
(In this case the frequency error is 0.8Hz.)
Calculation of 2’s complement representation
1) Positive number: Binary expression (Unmanipulated)
exp. 100 (decimal)
64 (hexadecimal) = 110 0100 (binary)
2) Negative number: 218 minus this number in binary expression
exp. –100 (decimal)
218 - 100 = 262044 (decimal) = 3FF9C (hexadecimal) = 11 1111 1111 1001 1100 (binary)
MS1478-E-01
11
2013/2
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AK1590.PDF ] | |
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