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What is MAX696?

This electronic component, produced by the manufacturer "Maxim Integrated", performs the same function as "Microprocessor Supervisory Circuits".


MAX696 Datasheet PDF - Maxim Integrated

Part Number MAX696
Description Microprocessor Supervisory Circuits
Manufacturers Maxim Integrated 
Logo Maxim Integrated Logo 


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MAX696/MAX697
Microprocessor Supervisory Circuits
General Description
The MAX696/MAX697 supervisory circuits reduce the
complexity and number of components required for
power-supply monitoring and battery-control functions
in microprocessor (μP) systems. These include μP reset
and backup-battery switchover, watchdog timer, CMOS
RAM write protection, and power-failure warning. The
MAX696/MAX697 significantly improve system reliability
and accuracy compared to that obtained with separate
ICs or discrete components.
The MAX696 and MAX697 are supplied in 16-pin pack-
ages and perform six functions:
1) A reset output during power-up, power-down, and
brownout conditions. The threshold for this “lowline”
reset is adjustable by an external voltagedivider.
2) A reset pulse if the optional watchdog timer has not
been toggled within a specified time.
3) Individual outputs for low-line and watchdog fault con-
ditions.
4) The reset time may be left at its default value of 50ms,
or may be varied with an external capacitor or clock
pulses.
5) A separate 1.3V threshold detector for power-fail warn-
ing, low-battery detection, or to monitor a power supply
other than VCC.
The MAX696 also has battery-backup switching for CMOS
RAM, CMOS microprocessor, or other lowpower logic.
The MAX697 lacks battery-backup switching, but has
write-protection pins (CE IN and CE OUT) for CMOS
RAM or EPROM. In addition, it consumes less than 250
microamperes.
Applications
● Computers
● Controllers
● Intelligent Instruments
Critical μP Power Monitoring
Typical Operating Circuit appears at end of data sheet.
Pin Configurations continued at end of data sheet.
Features
Adjustable Low-Line Monitor and Power-Down Reset
Power-OK/Reset Time Delay
Watchdog Timer—100ms, 1.6s, or Adjustable
● Minimum Component Count
1μA Standby Current
Battery-Backup Power Switching (MAX696)
On-Board Gating of Chip-Enable Signals (MAX697)
Separate Monitor for Power-Fail or Low-Battery
Warning
Ordering Information
PART
MAX696C/D
MAX696CPE
MAX696CWE
MAX696EPE
MAX696EJE
MAX696EWE
MAX696MJE
TEMP RANGE
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
PIN-PACKAGE
Dice
16 PDIP
16 Wide SO
16 PDIP
16 CERDIP
16 Wide SO
16 CERDIP
Ordering Information continued at end of data sheet.
Devices in PDIP and SO packages are available in both leaded
and lead(Pb)-free packaging. Specify lead free by adding the +
symbol at the end of the part number when ordering. Lead free
not available for CERDIP package.
Pin Configurations
TOP VIEW
VBATT 1
VOUT 2
16 RESET
15 RESET
VCC 3
GND 4
MAX696
14 WDO
13 LLIN
BATT ON 5
12 N.C.
LOW LINE 6
11 WDI
OSC IN 7
10 PFO
OSC SEL 8
9 PFI
19-0829; Rev 5; 7/14

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MAX696 equivalent
MAX696/MAX697
Microprocessor Supervisory Circuits
Pin Description
PIN
MAX696
MAX697
1—
2—
33
45
5
66
77
88
99
10 10
11 11
12 2
13 4
14 14
15 15
16 16
NAME
FUNCTION
VBATT
VOUT
VCC
GND
BATT ON
LOW LINE
OSC IN
OSC SEL
PFI
PFO
WDI
N.C.
LLIN
WDO
RESET
RESET
Backup-Battery Input. Connect to ground if a backup battery is not used.
The higher of VCC or VBATT is internally switched to VOUT. Connect VOUT to VCC if
VOUT and VBATT are not used.
+5V Input
0V Ground Reference for All Signals
BATT ON goes High when VOUT is Internally Switched to the VBATT Input. It goes
low when VOUT is internally switched to VCC. The output typically sinks 7mA and
can directly drive the base of an external pnp transistor to increase the output current
above the 50mA rating of VOUT.
LOW LINE goes Low when LLIN Falls Below 1.3V. It returns high as soon as LLIN
rises above 1.3V. See Figure 5.
OSC IN Sets the Reset Delay Timing and Watchdog Timeout Period when OSC SEL
Floats or is Driven Low. The timing can also be adjusted by connecting an external
capacitor to this pin. See Figure 7. When OSC SEL is high, OSC IN selects between
fast and slow watchdog timeout periods
When OSC SEL is Unconnected or Driven High, the Internal Oscillator Sets the
Reset Time Delay and Watchdog Timeout Period. When OSC SEL is low, the
external oscillator input, OSC IN, is enabled. OSC SEL has a 3µA internal pullup. See
Table 1.
PFI is the Noninverting Input to the Power-Fail Comparator. When PFI is less than
1.3V, PFO goes low. Connect PFI to GND or VOUT when not used. See Figure 1.
PFO is the Output of the Power-Fail Comparator. It goes low when PFI is less than
1.3V. The comparator is turned off and PFO goes low when VCC is below VBATT.
The Watchdog Input, WDI, is a Three-Level Input. If WDI remains either high or low
for longer than the watchdog timeout period, RESET pulses low and WDO goes low.
The watchdog timer is disabled when WDI is left floating or is driven to mid-supply.
The timer resets with each transition at the watchdog timer input.
No Connection. Leave this pin open.
Low-Line Input. LLIN is the CMOS input to a comparator whose other input is a
precision 1.3V reference. The output is LOW LINE and is also connected to the reset
pulse generator. See Figure 2.
The Watchdog Output, WDO, goes Low if WDI Remains either High or Low for
Longer than the Watchdog Timeout Period. WDO is set high by the next transition at
WDI. If WDI is unconnected or at mid-supply, WDO remains high. WDO also goes
high when LOW LINE goes low.
RESET goes Low whenever LLIN Falls Below 1.3V or VCC Falls Below the VBATT
Input Voltage. RESET remains low for 50ms after LLIN goes above 1.3V. RESET also
goes low for 50ms if the watchdog timer is enabled but not serviced within its timeout
period. The RESET pulse width can be adjusted as shown in Table 1.
RESET is an Active-High Output. It is the inverse of RESET.
www.maximintegrated.com
Maxim Integrated 5


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MAX696 datasheet


1. Supervisor, 16 Pin - Maxim

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