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What is C8051F591?

This electronic component, produced by the manufacturer "Silicon Laboratories", performs the same function as "Mixed Signal ISP Flash MCU Family".


C8051F591 Datasheet PDF - Silicon Laboratories

Part Number C8051F591
Description Mixed Signal ISP Flash MCU Family
Manufacturers Silicon Laboratories 
Logo Silicon Laboratories Logo 


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Analog Peripherals
- 12-Bit ADC
Up to 200 ksps
Up to 32 external single-ended inputs
VREF from on-chip VREF, external pin or VDD
Internal or external start of conversion source
Built-in temperature sensor
- Three Comparators
Programmable hysteresis and response time
Configurable as interrupt or reset source
Low current
On-Chip Debug
- On-chip debug circuitry facilitates full speed, non-
intrusive in-system debug (no emulator required)
- Provides breakpoints, single stepping,
inspect/modify memory and registers
- Superior performance to emulation systems using
ICE-chips, target pods, and sockets
- Low cost, complete development kit
Supply Voltage 1.8 to 5.25 V
- Typical operating current: 15 mA at 50 MHz;
Typical stop mode current: 230 µA
High-Speed 8051 µC Core
- Pipelined instruction architecture; executes 70% of
instructions in 1 or 2 system clocks
- Up to 50 MIPS throughput with 50 MHz clock
- Expanded interrupt handler
Automotive Qualified
- Temperature Range: –40 to +125 °C
C8051F58x/F59x
Mixed Signal ISP Flash MCU Family
Memory
- 8448 bytes internal data RAM (256 + 8192 XRAM)
- 128 or 96 kB Banked Flash; In-system programma-
ble in 512-byte Sectors
- External 64 kB data memory interface programma-
ble for multiplexed or non-multiplexed mode
Digital Peripherals
- 40, 33, or 25 Port I/O; All 5 V push-pull with high
sink current
- CAN 2.0 Controller—no crystal required
- LIN 2.1 Controller (Master and Slave capable); no
crystal required
- Two Hardware enhanced UARTs, SMBus™, and
enhanced SPI™ serial ports
- Six general purpose 16-bit counter/timers
- Two 16-Bit programmable counter array (PCA)
peripherals with six capture/compare modules each
and enhanced PWM functionality
Clock Sources
- Internal 24 MHz with ±0.5% accuracy for CAN and
master LIN operation.
- External oscillator: Crystal, RC, C, or clock
(1 or 2 pin modes)
- Can switch between clock sources on-the-fly;
useful in power saving modes
Packages
- 48-Pin QFP/QFN (C8051F580/1/4/5)
- 40-Pin QFN (C8051F588/9-F590/1)
- 32-Pin QFP/QFN (C8051F582/3/6/7)
ANALOG
PERIPHERALS
A 12-bit
M
U
200 ksps
X ADC
TEMP
SENSOR
Voltage VREG
Comparators 0-2 VREF
DIGITAL I/O
UART 0-1
SMBus
SPI
PCA x 2
Timers 0-5
CAN
LIN
Ports 0-4
Crossbar
External
Memory
Interface
24 MHz PRECISION
INTERNAL OSCILLATOR
2x Clock Multiplier
HIGH-SPEED CONTROLLER CORE
128 kB
ISP FLASH
FLEXIBLE
INTERRUPTS
8051 CPU
(50 MIPS)
DEBUG
CIRCUITRY
8 kB XRAM
POR WDT
Rev. 1.2 4/11
Copyright © 2011 by Silicon Laboratories C8051F580/1/2/3/4/5/6/7/8/9-F590/1
Free Datasheet http://www.Datasheet4U.com

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C8051F591 equivalent
C8051F58x/F59x
18.4.2. Non-multiplexed Configuration.............................................................. 163
18.5. Memory Mode Selection................................................................................ 164
18.5.1. Internal XRAM Only .............................................................................. 164
18.5.2. Split Mode without Bank Select............................................................. 164
18.5.3. Split Mode with Bank Select.................................................................. 165
18.5.4. External Only......................................................................................... 165
18.6. Timing .......................................................................................................... 165
18.6.1. Non-Multiplexed Mode .......................................................................... 167
18.6.1.1. 16-bit MOVX: EMI0CF[4:2] = 101, 110, or 111............................. 167
18.6.1.2. 8-bit MOVX without Bank Select: EMI0CF[4:2] = 101 or 111 ....... 168
18.6.1.3. 8-bit MOVX with Bank Select: EMI0CF[4:2] = 110 ....................... 169
18.6.2. Multiplexed Mode .................................................................................. 170
18.6.2.1. 16-bit MOVX: EMI0CF[4:2] = 001, 010, or 011............................. 170
18.6.2.2. 8-bit MOVX without Bank Select: EMI0CF[4:2] = 001 or 011 ....... 171
18.6.2.3. 8-bit MOVX with Bank Select: EMI0CF[4:2] = 010 ....................... 172
19. Oscillators and Clock Selection ......................................................................... 174
19.1. System Clock Selection................................................................................. 174
19.2. Programmable Internal Oscillator .................................................................. 176
19.2.1. Internal Oscillator Suspend Mode ......................................................... 176
19.3. Clock Multiplier .............................................................................................. 179
19.4. External Oscillator Drive Circuit..................................................................... 181
19.4.1. External Crystal Example...................................................................... 183
19.4.2. External RC Example............................................................................ 184
19.4.3. External Capacitor Example.................................................................. 184
20. Port Input/Output ................................................................................................. 186
20.1. Port I/O Modes of Operation.......................................................................... 188
20.1.1. Port Pins Configured for Analog I/O...................................................... 188
20.1.2. Port Pins Configured For Digital I/O...................................................... 188
20.1.3. Interfacing Port I/O in a Multi-Voltage System ...................................... 189
20.2. Assigning Port I/O Pins to Analog and Digital Functions............................... 189
20.2.1. Assigning Port I/O Pins to Analog Functions ........................................ 189
20.2.2. Assigning Port I/O Pins to Digital Functions.......................................... 189
20.2.3. Assigning Port I/O Pins to External Digital Event Capture Functions ... 190
20.3. Priority Crossbar Decoder ............................................................................. 190
20.4. Port I/O Initialization ...................................................................................... 193
20.5. Port Match ..................................................................................................... 198
20.6. Special Function Registers for Accessing and Configuring Port I/O ............. 202
21. Local Interconnect Network (LIN0)..................................................................... 212
21.1. Software Interface with the LIN Controller..................................................... 213
21.2. LIN Interface Setup and Operation................................................................ 213
21.2.1. Mode Definition ..................................................................................... 213
21.2.2. Baud Rate Options: Manual or Autobaud ............................................. 213
21.2.3. Baud Rate Calculations: Manual Mode................................................. 213
21.2.4. Baud Rate Calculations—Automatic Mode ........................................... 215
21.3. LIN Master Mode Operation .......................................................................... 216
Rev. 1.2
5
Free Datasheet http://www.Datasheet4U.com


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C8051F590The function is Mixed Signal ISP Flash MCU Family. Silicon LaboratoriesSilicon Laboratories
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