AL1101 Datasheet PDF - Wavefront
| Part Number | AL1101 | |
| Description | 24-Bit Analog-to-Digital Converter | |
| Manufacturers | Wavefront | |
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AL1101
24-Bit Analog-to-Digital Converter
General Description
The AL1101 is a 24-bit sigma-delta
stereo analog-to-digital audio converter
using Wavefront’s ClockEZ™ technology.
With dynamic range of 107dB, simplified
interface, and low power consumption,
the AL1101 (and its companion AL1201
DAC) is a best-in-class solution for
44.1kHz and 48kHz operation.
Applications
Digital Mixing Boards
Signal Processors
Digital Effects Boxes
Digital Recorders
Computer Sound Boards
Karaoke Systems
Car Audio Systems
Features
24-bit conversion
107dB dynamic range (A-wt)
0.002% THD (input = -1dBFS)
ClockEZ™ circuitry: internal PLL derives all
necessary timing signals from one external
Fs clock
64X oversampling, 5th order 1-bit -
¡
modulator
64:1 linear-phase digital decimation filter
Sample rate: 24kHz to 55kHz
Digital high-pass filter
Low power: 110mW (Fs = 48kHz)
Serial output selectable: 32/24 bits/frame
Full scale differential input = ±4V
5V operation
Architecture Block diagram and Package
INL+
INR+
INL-
INR-
AGND
MID
REF+
VA
REF-
AGND
VD DGND
DGND
DOUT
FORMAT
WDCLK
16 pin SOIC
150 mils wide
Wavefront Semiconductor ∴ 200 Scenic View Drive ∴ Cumberland, RI 02864 ∴ U.S.A.
Tel: +1 401 658-3670 ∴ Fax: +1 401 658-3680 ∴ Email: info@wavefrontsemi.com
On the web at www.wavefrontsemi.com
1
AL1101-0305
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Serial Output Interface
The AL1101 presents its two’s complement serial output data in a standard MSB-first format.
Two bitrates are provided: The 32-bits-per-frame rate (FORMAT low) is suitable for use in
systems where 256*Fs master clocks are present. The 24-bits-per-frame rate (FORMAT high) is
convenient when interfacing with circuits where 384*Fs master clocks are present.
The output sample period is defined between rising edges of wordclock (WDCLK) input.
Nominally, this is a 50% duty-cycle clock at frequency Fs, but it can be a pulse with
Ts/256 < Pulse Width < (255/256)*Ts; Ts=1/Fs.
Left channel data output starts when WDCLK rises, and right channel data output starts Ts/2
seconds later (on falling edge of WDCLK if WDCLK has a 50% duty cycle).
The serial bits are output on the rising edge of an internally generated bitclock (whose rising
edge is aligned with rising edge of WDCLK) that runs at 64*Fs when FORMAT is low (32-bits-per-
frame), or 48*Fs when FORMAT is high (24-bits-per-frame). The data is valid ±100ns from the
center of these bit-frames.
Serial Output Interface Formats
WDCLK (Fs, 50% duty cycle shown)
DOUT, 32 bits/frame 23
DOUT, 24 bits/frame 23
Left Channel
0
Right Channel
23
0 23
0
0
Serial Output Interface Timing
WDCLK (Fs, 50% duty cycle shown)
64Fs bitclk (internal)
LEFT
DOUT
VALID
100ns100ns
Ts/128
Ts/64
VALID
100ns100ns
RIGHT
VALID
100ns100ns
Ts/128
Ts/64
VALID
100ns100ns
WDCLK (Fs, 50% duty cycle shown)
48Fs bitclk (internal)
LEFT
DOUT
VALID
100ns100ns
Ts/96
Ts/48
VALID
100ns100ns
RIGHT
VALID
100ns100ns
Ts/96
Ts/48
VALID
100ns100ns
www.wavefrontsemi.com
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for AL1101 electronic component. |
| Information | Total 8 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ AL1101.PDF Datasheet ] | |
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Featured Datasheets
| Part Number | Description | Manufacturers |
| AL1101 | The function is 24-Bit Analog-to-Digital Converter. | Wavefront |
| AL1101 | The function is stereo ADC. |  Alesis |
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